@phdthesis{Krstic2006, author = {Krstic, Milos}, title = {Request-driven GALS technique for datapath architectures}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-000000888}, school = {BTU Cottbus - Senftenberg}, year = {2006}, abstract = {In this thesis a novel Globally Asynchronous Locally Synchronous (GALS) technique applicable to wireless communication systems and generally to datapath architectures is presented. The proposed concept is intended for point-to-point communication with very intensive but bursty data transfer. This concept is based on a request-driven operation of locally synchronous modules. The key idea is that a module can use the input request signal as its clock while receiving a burst of data. The developed GALS technique is applied to the design of an IEEE 802.11a compliant baseband processor with the aim to alleviate the problems of system integration, power consumption and electro-magnetic interference. The GALS design was compared with a synchronous version of the baseband processor. In our experimental setup we have measured a 1\% reduction in dynamic power consumption, 30\% reduction in instantaneous supply voltage variations, and 5 dB reduction in spectral noise.}, subject = {GAL ; GALS; Systemintegration; Asynchroner Entwurf; EMI; BIST}, language = {en} } @inproceedings{SegabinazziFerreiraGeorgeChenetal.2019, author = {Segabinazzi Ferreira, Raphael and George, Nevin and Chen, Junchao and H{\"u}bner, Michael and Krstic, Milos and Nolte, J{\"o}rg and Vierhaus, Heinrich Theodor}, title = {Configurable Fault Tolerant Circuits and System Level Integration for Self-Awareness}, isbn = {978-3-902457-54-7}, doi = {10.26127/BTUOpen-5050}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-50503}, year = {2019}, abstract = {Scaling minimum features of ICs down to the 10nm- area and below has allowed high integration rates in electronics. Scaling at supply voltages of 1V and below also implies a rising level of stress which drives aging effects that reduce switching speed and the expected life time. Additionally, vulnerability from particle radiation is increased. Hence, fault detection and on-line correction become a must for many applications. However, not only fault tolerance but self-awareness becomes also an advantage. Provided that by being aware of its own healthy state allow optimized configurations regarding system operation modes and configurable hardware mechanism. This paper shows a preliminary work in a configurable circuit and explores its configuration possibilities when integrated into a complete system.}, subject = {Self-awareness; Configurable circuits; Fault tolerant; Operation modes; Integrierte Schaltung; Konfiguration ; Fehlertoleranz}, language = {en} }