@misc{AlpirezBock2015, type = {Master Thesis}, author = {Alpirez Bock, Estuardo}, title = {SCA resistent implementation of the Montgomery kP-algorithm}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-36288}, school = {BTU Cottbus - Senftenberg}, year = {2015}, abstract = {Mathematically, cryptographic approaches are secure. This means that the time an attacker needs for finding the secret by brute forcing these approaches is about the time of the existence of our world. Practically, an algorithm implemented in hardware is a device that generates a lot of additional data during the calculation process. Its power consumption, electromagnetic radiation, etc. can be measured, saved and analysed for key extraction. Such attacks are called side channel analysis attacks and are significant threats when applying cryptographic algorithms. By considering these attacks when implementing a cryptographic algorithm, it is possible to design an implementation that is more resistant against them. The goal of this thesis was to design a methodology to securely implement the Montgomery kP-operation using an IHP implementation as a starting point. In addition, the area and energy consumption of the secure Montgomery kP-multiplier should still be highly efficient. The resistance against power analysis attacks of two different IHP ECC implementations was analysed in this thesis. A horizontal power analysis attack using the difference-of-means test was performed with the goal of finding potential leakage sources exploited in side channel analysis attacks, i.e. finding the reasons of a correct extraction of the cryptographic key. For both analysed ECC designs, four key candidates were extracted with a correctness of 90\% or more. Through analysis of the implemented Montgomery kP-algorithm's functionality and its power consumption, it was established that the algorithm's operation execution flow was the main cause of the implementations' vulnerability. Thus, a design methodology consisting in changing the Montgomery kP-algorithm operation flow was developed. As a result, the re-designed implementations do not deliver any correctly extracted key candidates whenever the difference-of-means test is performed on them. These re-designs implied an increase on the chip area by about 5\% for each implementation. The execution time needed for performing a complete kP-operation was reduced for both designs. Thereby one implementation's execution time was reduced by 12\% in comparison to its original version and even though its power consumption was increased by 9\%, its energy consumption per kP-operation was reduced by 4.5\%.}, subject = {Side channel analysis; Elliptic curve cryptography; Power analysis; Difference-of-means test; Elliptic curve point multiplication; Elliptische Kurve; Kryptologie}, language = {en} } @techreport{BockDyka2015, author = {Bock, Estuardo Alpirez and Dyka, Zoya}, title = {Vulnerability assessment of an IHP ECC implementation}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-34908}, year = {2015}, abstract = {Mathematically, cryptographic approaches are secure. This means that the time an attacker needs for finding the secret by brute forcing these approaches is about the time of the existence of our world. Practically, an algorithm implemented in hardware is a device that generates a lot of additional data during calculation. Its power consumption, electromagnetic radiation etc. can be measured, saved and analysed for the key extraction. Such attacks - the side channel analysis attacks (SCA attacks) - are significant threats when applying cryptographic algorithms. By taking the issue of physical attacks into consideration when implementing a cryptographic algorithm, it is possible to design an implementation that is resilient - at least to a certain extend - against side channel analyses. In this report, we give implementation details of the IHP accelerator for the elliptic curve point multiplication. We analysed the implemented algorithm ow and its power consumption using simulated power traces for the 130nm CMOS IHP technology. We made a horizontal power analysis attack using the difference-of-means test with the goal of finding potential SCA leakage sources, i.e. finding the operations in the algorithmic ow that are responsible for the correct extraction of the cryptographic key.}, subject = {Elliptic curve cryptography; Side channel analysis; Power analysis; Difference of means test; Hardware; CMOS-Schaltung; Kryptologie}, language = {en} } @misc{Vogel2018, type = {Master Thesis}, author = {Vogel, Elisabeth}, title = {Analyse von EM-Kartographie als Mittel zur Bestimmung von Leakage-Quellen sowie des Effektes geeigneter Gegenmaßnahmen}, doi = {10.26127/BTUOpen-6454}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-64545}, school = {BTU Cottbus - Senftenberg}, year = {2018}, abstract = {The Internet of Things (IoT) and Wireless Sensor Networks (WSNs) are essential for today's global information society, relying on small wireless devices for networking. When these devices' functionalities or data are manipulated, the potential damage is significant. Hence, securing data transmission between these devices using cryptography is crucial. However, the security of cryptographic algorithms depends on the secrecy of cryptographic keys, which can be vulnerable due to physical accessibility. Side-channel analysis attacks can exploit this vulnerability by using physical parameters associated with the operation of cryptographic chips, such as electromagnetic radiation during cryptographic operations. In response to this challenge, the Leakage Source Cartography Tool (LSC-Tool) was developed in this thesis to expedite the analysis of electromagnetic radiation in IHP's elliptic curve cryptography designs. The LSC-Tool enables automated evaluation of sets of electromagnetic traces, obtained from different measurement positions across a cryptographic chip. The analysis results in a leakage source map (LS-map) that displays the success of electromagnetic analysis attacks at each measurement point. This tool offers a cost-effective and rapid means to assess the resistance of cryptographic designs against attacks, providing designers with insights into the most vulnerable areas of the chip and information about leakage per clock cycle. By applying the LSC-Tool, the resistance of two IHP ECC designs against horizontal differential electromagnetic analysis attacks was tested across 25 measurement positions. The statistical analysis of traces can be conducted using three methods: the least squares method, the difference-of-means-test, or the difference-of-the-mean method. The generated LS-maps show that using different methods yields distinct leakage source indications. Combining these maps enhances the attack's success rate. Notably, during this research, it became evident that the LSC-Tool could be adapted to create LS-maps for the functional blocks of ECC designs, enabling the analysis of simulated power traces for IHP ECC designs.}, subject = {EM-Kartographie; Elliptische Kurven; Power Analysis Angriffe; Seitenkanalattacke; Fehleranalyse; Kryptosystem; Elektromagnetische Strahlung; Elliptische Kurve; Side-channel-analysis; Countermeasures; Power analysis}, language = {de} }