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The use of alternating current (AC) electrokinetic forces, like dielectrophoresis and AC electroosmosis, as a simple and fast method to immobilize sub-micrometer objects onto nanoelectrode arrays is presented. Due to its medical relevance, the influenza virus is chosen as a model organism. One of the outstanding features is that the immobilization of viral material to the electrodes can be achieved permanently, allowing subsequent handling independently from the electrical setup. Thus, by using merely electric fields, we demonstrate that the need of prior chemical surface modification could become obsolete. The accumulation of viral material over time is observed by fluorescence microscopy. The influences of side effects like electrothermal fluid flow, causing a fluid motion above the electrodes and causing an intensity gradient within the electrode array, are discussed. Due to the improved resolution by combining fluorescence microscopy with deconvolution, it is shown that the viral material is mainly drawn to the electrode edge and to a lesser extent to the electrode surface. Finally, areas of application for this functionalization technique are presented.
We present a statistical procedure for the extraction of parameters of a compact model for memristive devices. Thereby, in a circuit simulation the typical fluctuations of the current–voltage (I-V) characteristics from device-to-device (D2D) and from cycle-to-cycle (C2C) can be emulated. The approach is based on the Stanford model
whose parameters play a key role to integrating D2D and C2C dispersion. The influence of such variabilities over the model’s parameters is investigated by using a fitting algorithm fed with experimental data. After this, the statistical distributions of the parameters are used in a Monte Carlo simulation to reproduce the I-V D2D and C2C dispersions which show a good agreement to the measured curves. The results allow the simulation of the on/off current variation for the design of RRAM cells or memristor-based artificial neural networks.
A new kind of transistor device with a graphene monolayer embedded between two n-type silicon layers is fabricated and characterized. The device is called graphene-base heterojunction transistor (GBHT). The base-voltage controls the current of the device flowing from the emitter via graphene to the collector. The transit time for electrons passing by the ultrathin graphene layer is extremely short which makes the device very promising for high frequency RF-electronics. The output current of the device is saturated and clearly modulated by the base voltage. Further, the silicon collector of the GBHT is replaced by germanium to improve the device performance. This enabled the collector current to be increased by almost three orders of magnitude. Also, the common-emitter current gain (Ic/Ib) increased from 10-3 to approximately 0.3 for the newly designed device. However, the ON-OFF ratio of the improved germanium based GBHT has so far been rather low. Further optimizations are necessary in order to fully exploit the potential of the graphene-base heterojunction transistor.
In Memory Computing (IMC) is one of the most promising candidates
for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is principal component analysis (PCA), which heavily relies on matrixvector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental
demonstration of a new IMCbased PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching random-access memory (RRAM). The classification accuracy of the Wisconsin Breast Cancer data set reaches 95.43%, close to floatingpoint implementation. Our simulations indicate a 250× improvement in energy efficiency compared to commercial GPUs, thus supporting IMC for energy-efficient ML in modern data-intensive computing.
We have performed different simulation experiments in relation to hardware neural networks (NN) to analyze the role of the number of synapses for different NN architectures in the network accuracy, considering different datasets. A technology that stands upon 4-kbit 1T1R ReRAM arrays, where resistive switching devices based on HfO2 dielectrics are employed, is taken as a reference. In our study, fully dense (FdNN) and convolutional neural networks (CNN) were considered, where the NN size in terms of the number of synapses and of hidden layer neurons were varied. CNNs work better when the number of synapses to be used is limited. If quantized synaptic weights are included, we observed thatNNaccuracy decreases significantly as the number of synapses is reduced; in this respect, a trade-off between the number of synapses and the NN accuracy has to be achieved. Consequently, the CNN architecture must be carefully designed; in particular, it was noticed that different datasets need specific architectures according to their complexity to achieve good results. It was shown that due to the number of variables that can be changed in the optimization of a NN hardware implementation, a specific solution has to be worked in each case in terms of synaptic weight levels, NN architecture, etc.
Resistive switching memory (RRAM) is a promising technology for highly efficient computing scenarios. RRAM arrays enabled the acceleration of neural networks for artificial intelligence and the creation of In-Memory Computing circuits. However, the arrays are affected by several issues materializing in conductance variations that might cause severe performance degradation in those applications. Among those, one is related to the drift of the low conductance states appearing immediately at the end of program and verify algorithms that are fundamental for an accurate Multi-level conductance operation. In this work, we tackle the issue by developing an Incremental Reset and Verify technique showing enhanced variability and reliability features compared with a traditional refresh-based approach.
With the rapid emergence of in-memory computing systems based on memristive technology, the integration of such memory devices in large-scale architectures is one of the main aspects to tackle.
In this work we present a study of HfO2-based memristive devices for their integration in large-scale CMOS systems, namely 200 mm wafers. The DC characteristics of single metal–insulator–metal
devices are analyzed taking under consideration device-to-device variabilities and switching properties. Furthermore, the distribution of the leakage current levels in the pristine state of the
samples are analyzed and correlated to the amount of formingless memristors found among the measured devices. Finally, the obtained results are fitted into a physic-based compact model that
enables their integration into larger-scale simulation environments.
This work reports forming free/self-rectifying resistive switching characteristics and dependency of the top electrode (TE) of a crystalline HfO2-based resistive switching memory device. In the memory cells, nonlinear bipolar resistive switching characteristics, i.e., an asymmetric current-voltage curve like the Schottky diode, was
observed. In addition, the device exhibits resistive switching behaviors without forming process, which makes it possible to switch the resistance state under ultra-low current levels of <10 nA. In addition, compared to the resistive switching of the proposed resistive switching memory devices with different TEs, the VSET was decreased when using TE with lower work function, and the height read margin was obtained in the sample with the Ni TE, covering over 56 × 56 arrays. Consequently, these results indicate that the interface control resistive switching properties in memory structures having the Schottky junction warrant the realization of selector-free resistive
switching memory cells in a high-density crossbar array.
Influence of variability on the performance of HfO2 memristor-based convolutional neural networks
(2021)
A study of convolutional neural networks (CNNs) was performed to analyze the influence of quantization and variability in the network synaptic weights. Different CNNs were considered accounting for the number of convolutional layers, size of the filters in the convolutional layer, number of neurons in the final network layers and different sets of quantization levels. The conductance levels of fabricated 1T1R structures based on HfO2 memristors were considered as reference for four or eight level quantization processes at the inference stage of the CNNs, which were previous trained with the MNIST dataset. We also included the variability of the experimental conductance levels that was found to be Gaussian distributed and was correspondingly modeled for the synaptic weight implementation.
The use of thin layers of amorphous hafnium oxide has been shown to be suitable for the manufacture of Resistive Random-Access memories (RRAM). These memories are of great interest because of their simple structure and non-volatile character. They are particularly appealing as they are good candidates for substituting flash memories. In this work, the performance of the MIM structure that takes part of a 4 kbit memory array based on 1-transistor-1-resistance (1T1R) cells was studied in terms of control of intermediate states and cycle durability. DC and small signal experiments were carried out in order to fully characterize the devices, which presented excellent multilevel capabilities and resistive-switching behavior.
Achieving a reliable multi-level programming operation in resistive random access memory (RRAM) arrays is still a challenging task. In this work, we assessed the impact of the voltage step value used by the programming algorithm on the device-to-device (DTD) variability of the current distributions of four conductive levels and on the energy consumption featured by programming 4-kbit HfO2-based RRAM arrays. Two different write-verify algorithms were considered and compared, namely, the incremental gate voltage with verify algorithm (IGVVA) and the incremental step pulse with verify algorithm (ISPVA). By using the IGVVA, a main trade-off has to be taken into account since reducing the voltage step leads to a smaller DTD variability at the cost of a strong increase in the energy consumption. Although the ISPVA can not reduce the DTD variability as much as the IGVVA, its voltage step can be decreased in order to reduce the energy consumption with almost no impact on the DTD variability. Therefore, the final decision on which algorithm
to employ should be based on the specific application targeted for the RRAM array.
A key requirement for RRAM in neural network accelerators with a large number of synaptic parameters is the multilevel programming. This is hindered by resistance imprecision due to cycle-to-cycle and device-to-device variations. Here, we compare two multilevel programming algorithms to minimize resistance variations in a 4-kbit array of HfO 2 RRAM. We show that gate-based algorithms have the highest reliability. The optimized scheme is used to implement a neural network with 9-level weights, achieving 91.5% (vs. software 93.27%) in MNIST recognition.
Accomplishing multi-level programming in resistive random access memory (RRAM) arrays with truly discrete and linearly spaced conductive levels is crucial in order to implement synaptic weights in hardware-based neuromorphic systems. In this paper, we implemented this feature on 4-kbit 1T1R RRAM arrays by tuning the programming parameters of the multi-level incremental step pulse with verify algorithm (M-ISPVA). The optimized set of parameters was assessed by comparing its results with a non-optimized one. The optimized set of parameters proved to be an effective way to define non-overlapped conductive levels due to the strong reduction of the device-to-device variability as well as of the cycle-to-cycle variability, assessed by inter-levels switching tests and during 1k reset-set cycles. In order to evaluate this improvement in real scenarios, the experimental characteristics of the RRAM devices were captured by means of a behavioral model, which was used to simulate two different neuromorphic systems: an 8×8 vector-matrixmultiplication (VMM) accelerator and a 4-layer feedforward neural network for MNIST database recognition. The results clearly showed that the optimization of the programming parameters improved both the precision of VMM results as well as the recognition accuracy of the neural network in about 6% compared with the use of non-optimized parameters.
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of
experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance
levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
Characterization and Separation of Live and Dead Yeast Cells Using CMOS-Based DEP Microfluidics
(2021)
This study aims at developing a miniaturized CMOS integrated silicon-based microfluidic system, compatible with a standard CMOS process, to enable the characterization, and separation of live and dead yeast cells (as model bio-particle organisms) in a cell mixture using the DEP technique. DEP offers excellent benefits in terms of cost, operational power, and especially easy electrode integration with the CMOS architecture, and requiring label-free sample preparation. This can increase the likeliness of using DEP in practical settings. In this work the DEP force was generated using an interdigitated electrode arrays (IDEs) placed on the bottom of a CMOS-based silicon
microfluidic channel. This system was primarily used for the immobilization of yeast cells using DEP. This study validated the system for cell separation applications based on the distinct responses of live and dead cells and their surrounding media. The findings confirmed the device’s capability for efficient, rapid and selective cell separation. The viability of this CMOS embedded microfluidic for dielectrophoretic cell manipulation applications and compatibility of the dielectrophoretic structure with CMOS production line and electronics, enabling its future commercially mass production.
In this work, we present an integrated read and programming circuit for Resistive Random Access Memory (RRAM) cells. Since there are a lot of different RRAM technologies in research and the process variations of this new memory technology often spread over a wide range of electrical properties, the proposed circuit focuses on versatility in order to be adaptable to different cell properties. The circuit is suitable for both read and programming operations based on voltage
pulses of flexible length and height. The implemented read method is based on evaluating the voltage drop over a measurement resistor and can distinguish up to eight different states, which are coded in binary, thereby realizing a digitization of the analog memory value. The circuit was fabricated in the 130 nm CMOS process line of IHP. The simulations were done using a physics-based, multi-level RRAM model. The measurement results prove the functionality of the read circuit and the programming system and demonstrate that the read system can distinguish up to eight different states with an overall resistance ratio of 7.9.
A crucial step in order to achieve fast and low-energy switching operations in resistive random access memory (RRAM) memories is the reduction of the programming pulse width. In this study, the incremental step pulse with verify algorithm (ISPVA) was implemented by using different pulse widths between 10 μ s and 50 ns and assessed on Al-doped HfO 2 4 kbit RRAM memory arrays. The switching stability was assessed by means of an endurance test of 1k cycles. Both conductive levels and voltages needed for switching showed a remarkable good behavior along 1k reset/set cycles regardless the programming pulse width implemented. Nevertheless, the distributions of voltages as well as the amount of energy required to carry out the switching operations were definitely affected by the value of the pulse width. In addition, the data retention was evaluated after the endurance analysis by annealing the RRAM devices at 150 °C along 100 h. Just an almost negligible increase on the rate of degradation of about 1 μ A at the end of the 100 h of annealing was reported between those samples programmed by employing a pulse width of 10 μ s and those employing 50 ns. Finally, an endurance performance of 200k cycles without any degradation was achieved on 128 RRAM devices by using programming pulses of 100 ns width
This work investigates the transition from digital to gradual or analog resistive switching in yttrium oxide‐based resistive random‐access memory devices. It is shown that this transition is determined by the amount of oxygen in the functional layer. A homogeneous reduction of the oxygen content not only reduces the electroforming voltage, allowing for forming‐free devices, but also decreases the voltage operation window of switching, thereby reducing intra‐device variability. The most important effect as the dielectric becomes substoichiometric by oxygen engineering is that more intermediate (quantized) conduction states are accessible. A key factor for this reproducibly controllable behavior is the reduced local heat dissipation in the filament region due to the increased thermal conductivity of the oxygen depleted layer. The improved accessibility of quantized resistance states results in a semi‐gradual switching both for the set and reset processes, as strongly desired for multi‐bit storage and for an accurate definition of the synaptic weights in neuromorphic systems. A theoretical model based on the physics of mesoscopic structures describing current transport through a nano‐constriction including asymmetric potential drops at the electrodes and non‐linear conductance quantization is provided. The results contribute to a deeper understanding on how to tailor materials properties for novel memristive functionalities.
Logic-in-memory (LiM) circuits based on resistive random access memory (RRAM) devices and the material implication logic are promising candidates for the development of low-power computing devices that could fulfill the growing demand of distributed computing systems. However, these circuits are affected by many reliability challenges that arise from device nonidealities (e.g., variability) and the characteristics of the employed circuit architecture. Thus, an accurate investigation of the variability at the array level is needed to evaluate the reliability and performance of such circuit architectures. In this work, we explore the reliability and performance of smart IMPLY (SIMPLY) (i.e., a recently proposed LiM architecture with improved reliability and performance) on two 4-kb RRAM arrays based on different resistive switching oxides integrated in the back end of line (BEOL) of the 0.25- μm BiCMOS process. We analyze the tradeoff between reliability and energy consumption of SIMPLY architecture by exploiting the results of an extensive array-level variability characterization of the two technologies. Finally, we study the worst case performance of a full adder implemented with the SIMPLY architecture and benchmark it on the analogous CMOS implementation.
A comprehensive analysis of two types of artificial neural networks (ANN) is performed to assess the influence of quantization on the synaptic weights. Conventional multilayer-perceptron (MLP) and convolutional neural networks (CNN) have been considered by changing their features in the training and inference contexts, such as number of levels in the quantization process, the number of hidden layers on the network topology, the number of neurons per hidden layer, the image databases, the number of convolutional layers, etc. A reference technology based on 1T1R structures with bipolar memristors including HfO2 dielectrics was employed, accounting for different multilevel schemes and the corresponding conductance quantization algorithms. The accuracy of the image recognition processes was studied in depth. This type of studies are essential prior to hardware implementation of neural networks. The obtained results support the use of CNNs for image domains. This is linked to the role played by convolutional layers at extracting image features and reducing the data complexity. In this case, the number of synaptic weights can be reduced in comparison to conventional MLPs.
Analogue pattern recognition with stochastic switching binary CMOS‑integrated memristive devices
(2020)
Biological neural networks outperform todays computer technology in terms of power consumption and computing speed when associative tasks, like pattern recognition, are to be solved. The analogue and massive parallel in-memory computing in biology differs strongly with conventional transistor electronics using the von Neumann architecture. Therefore, novel bio-inspired computing architectures are recently highly investigated in the area of neuromorphic computing. Here, memristive devices, which serve as non-volatile resistive memory, are used to emulate the plastic behaviour of biological synapses. In particular, CMOS integrated resistive random access memory (RRAM) devices are promising candidates to extend conventional CMOS technology in neuromorphic systems. However, dealing with the inherent stochasticity of the resistive switching effect can be challenging for network performance. In this work, the probabilistic switching is exploited to emulate stochastic plasticity with fully CMOS integrated binary RRAM devices. Two different RRAM technologies with different device variabilities are investigated in detail and their use in a stochastic artificial neural network (StochANN) to solve the MINST pattern recognition task is examined. A mixed-signal implementation with hardware synapses and software neurons as well as numerical simulations show the proposed concept of stochastic computing is able to handle analogue data with binary memory cells.
Chronic Obstructive Pulmonary Disease (COPD) is a life-threatening lung disease, affecting millions of people worldwide. Implementation of Machine Learning (ML) techniques is crucial for the effective management of COPD in home-care environments. However, shortcomings of cloud-based ML tools in terms of data safety and energy efficiency limit their integration with low-power medical devices. To address this, energy efficient neuromorphic platforms can be used for the hardware-based implementation of ML methods. Therefore, a memristive neuromorphic platform is presented in this paper for the on-chip recognition of saliva samples of COPD patients and healthy controls. The results of its performance evaluations showed that the digital neuromorphic chip is capable of recognizing unseen COPD samples with accuracy and sensitivity values of 89% and 86%, respectively. Integration of this technology into personalized healthcare devices will enable the better management of chronic diseases such as COPD.
Chronic Obstructive Pulmonary Disease (COPD) is a life-threatening lung disease and a major cause of morbidity and mortality worldwide. Although a curative therapy has yet to be found, permanent monitoring of biomarkers that reflect the disease progression plays a pivotal role for the effective management of COPD. The accurate examination of respiratory tract fluids like saliva is a promising approach for staging the disease and predicting its upcoming exacerbations in a Point-of-Care (PoC) environment. Nonetheless, this approach is only feasible by concurrent consideration of patients' demographic and medical parameters. Therefore, Machine Learning (ML) tools are necessary for the comprehensive recognition of COPD in a PoC setting. As a result, the objective of this work was to implement ML tools on the data acquired from characterizing saliva samples of COPD patients and healthy controls for classification purposes. First, a permittivity biosensor was used to characterize dielectric properties of saliva samples and, subsequently, ML tools were applied on the acquired data for classification. The XGBoost gradient boosting algorithm provided a high classification accuracy of 91.25%, making it a promising model for COPD recognition. Integration of this model on a neuromorphic chip, in the future, will enable the real-time detection of COPD in PoC, with low energy consumption and high patient privacy.
In this work, voltage distributions of forming operations are analyzed by using an advanced statistical approach based on phase-type distributions (PHD). The experimental data were collected from batches of 128 HfO2-based RRAM devices integrated in 4-kbit arrays. Three di erent switching oxides, namely, polycrystalline HfO2, amorphous HfO2, and Al-doped HfO2, were tested in the temperature range from -40 to 150 oC. The variability of forming voltages has been usually studied by using the Weibull distribution (WD). However, the performance of the PHD analysis demonstrated its ability to better model this crucial operation. The capacity of the PHD to reproduce the experimental data has been validated by means of the Kolmogorov-Smirnov test, while the WD failed in many of the cases studied. In addition, PHD allows to extract information about intermediate probabilistic states that occur in the forming process and the transition probabilities between them; in this manner, we can deepen on the conductive lament formation physics. In particular, the number of intermediate states can be related to the device variability.
An artificial neural network based on resistive switching memristors is implemented and simulated in LTspice. The influence of memristor variability and the reduction of the continuous range of synaptic weights into a discrete set of conductance levels is analyzed. To do so, a behavioral model is proposed for multilevel resistive switching memristors based on Al-doped HfO2 dielectrics, and it is implemented in a spice based circuit simulator. The model provides an accurate description of the conductance in the different conductive states in addition to describe the device-to-device variability
This paper investigates the practicality of applying braininspired Few-Shot Learning (FSL) algorithms for addressing shortcomings of Machine Learning (ML) methods in medicine with limited data availability. As a proof of concept, the application of ML for the detection of Chronic Obstructive Pulmonary Disease (COPD) patients was investigated. The complexities associated with the distinction of COPD and asthma patients and the lack of sufficient training data for asthma subjects impair the performance of conventional ML models for the recognition of COPD. Therefore, the objective of this study was to implement FSL methods for the distinction of COPD and asthma subjects with a few available data points. The proposed FSL models in this work were capable of recognizing asthma and COPD patients with 100% accuracy, demonstrating the feasibility of the approach for applications such as medicine with insufficient data availability.
Selective growth of fully relaxed GeSn nano-islands by nanoheteroepitaxy on patterned Si(001)
(2016)
Observation of field emission from GeSn nanoparticles epitaxially grown on silicon nanotip arrays
(2016)
Controlling the physics and chemistry of binary and ternary praseodymium and cerium oxide systems
(2015)
Graphene field effect transistors with Niobium contacts and asymmetric transfer characteristics
(2015)