FG Mikroelektronik
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This paper presents a fully differential track-and-hold amplifier (THA) architecture for high-speed applications. The proposed design employs a distinctive switching arrangement that converts non-linear errors into a constant offset and provides an initialization sub-phase before tracking. The circuit utilizes two capacitors in the signal path to enable gain flexibility, providing an accurate output during hold mode. The THA was implemented in 65−nm CMOS technology with a 1.2 V supply voltage. The results of the simulation after layout demonstrate a droop rate of 2.5mV/μS, a hold-mode settling time of 2ns for a 1pF hold capacitor.
Multipliers are an important general-purpose analog function. Precision multipliers are still mostly based on bipolar transistors. In CMOS, small-signal based multipliers are often used as mixers. There are many approaches in CMOS that use the squaring characteristics of the MOSFET, but they do not come close to the accuracy and linearity of bipolar multipliers. This paper presents a new principle and verifies it on a four-quadrant multiplier on a test chip in 65 nm CMOS technology. A new type of input predistortion is used to drive the cascaded differential stage. With a supply voltage of 1.2 V and differential input signals of up to ±700 mV, a linearity of better than 0.5 % of the measurement range is achieved over a wide temperature and frequency range.
This paper presents a detailed analysis of a function generator that utilizes a fully differential analog input processed through a current subtractor, offset comparators, thermometercoded current steering X-iDAC, programmable ROM, 11-to-32 decoder and Y-iDAC. This configuration enables precise and customizable waveform generation, crucial for various applications in analog computing and signal processing.