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Aussetzbarer Taktgenerator
(2008)
GALS Partitioning Methodology for Substrate Noise Reduction in Mixed-Signal Integrated Circuits
(2016)
Frequency-Domain Modeling of Ground Bounce and Substrate Noise for Synchronous and GALS Systems
(2015)
Scaling minimum features of ICs down to the 10nm- area and below has allowed high integration rates in electronics. Scaling at supply voltages of 1V and below also implies a rising level of stress which drives aging effects that reduce switching speed and the expected life time. Additionally, vulnerability from particle radiation is increased. Hence, fault detection and on- line correction become a must for many applications. However, not only fault tolerance but self-awareness becomes also an advantage. Provided that by being aware of its own healthy state allow optimized configurations regarding system operation modes and configurable hardware mechanism. This paper shows a preliminary work in a configurable circuit and explores its configuration possibilities when integrated into a complete system.