A current mirror Based read circuit design with multi-level capability for resistive switching deviceb
- This paper presents a read circuit design for resistive memory cells based on current mirrors. The circuit utilizes high-precision current mirrors and reference cells to determine the state of resistive memory using comparators. It offers a high degree in adaptability in terms of both resistance range and number of levels. Special emphasis was put on device protection to prevent accidental programming of the memory during read operations. The realized circuit can resolve eight states with a resolution of up to 1 k Ω, realizing a digitization of the analog memory information. Furthermore, the integration in a complete memory macro is shown. The circuit was realized in a 130 nm-process but can easily be adapted to other processes and resistive memory technologies.
Author: | Stefan Pechmann, Eduardo Perez, Christian WengerORCiD, Amelie Hagelauer |
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DOI: | https://doi.org/10.1109/ICEIC61013.2024.10457188 |
ISBN: | 979-8-3503-7188-8 |
ISSN: | 2767-7699 |
Title of the source (English): | 2024 International Conference on Electronics, Information, and Communication (ICEIC) |
Publisher: | Institute of Electrical and Electronics Engineers (IEEE) |
Document Type: | Conference publication peer-reviewed |
Language: | English |
Year of publication: | 2024 |
Tag: | RRAM; memristive device |
Number of pages: | 4 |
Way of publication: | Open Access |
Faculty/Chair: | Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Halbleitermaterialien |