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Solid-state reaction between Pr and SiO2 studied by photoelectron spectroscopy and ab initio calculations

  • We report on the structural and electrical properties of Pr-based high-k dielectric films fabricated by solid-state reaction between metallic Pr and SiO2 underlayers. A non-destructive depth profiling using synchrotron radiation excited photoelectron spectroscopy (SR-PES), X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) were employed to examine the chemical composition and microstructure. Ab initio calculations were done to gain insight into the physical processes involved. SR-PES results indicate that Pr deposition at room temperature (RT) leads to the formation of a Pr silicide and a Pr oxide, what is in good agreement with the scenario expected from ab initio calculations. As revealed by TEM and electrical measurements, oxidation of the reacted structures, followed by annealing, results in a stacked dielectric composed of a SiO2-based buffer with an enhanced permittivity and a Pr silicate film with a high dielectric constant. The leakage current density of 10-4 A/cm2 was measured for stacks withWe report on the structural and electrical properties of Pr-based high-k dielectric films fabricated by solid-state reaction between metallic Pr and SiO2 underlayers. A non-destructive depth profiling using synchrotron radiation excited photoelectron spectroscopy (SR-PES), X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) were employed to examine the chemical composition and microstructure. Ab initio calculations were done to gain insight into the physical processes involved. SR-PES results indicate that Pr deposition at room temperature (RT) leads to the formation of a Pr silicide and a Pr oxide, what is in good agreement with the scenario expected from ab initio calculations. As revealed by TEM and electrical measurements, oxidation of the reacted structures, followed by annealing, results in a stacked dielectric composed of a SiO2-based buffer with an enhanced permittivity and a Pr silicate film with a high dielectric constant. The leakage current density of 10-4 A/cm2 was measured for stacks with capacitance equivalent thickness (CET) of 1.5 nm prepared by evaporation of the Pr layer on a 1.8 nm SiO2 film, followed by oxidation in air ambient and annealing in N2 atmosphere. The capacitance-voltage (C-V) curves exhibit a large flatband voltage (VFB) shift indicating the presence of a positive charge in the stack. Switching away from the Al contacts to Au gate electrodes introduces a significant reduction of the VFB by 1.3 eV, what is much more than the change expected from the work function difference between Al and Au (not, vert, similar0.9 eV). This in turn implies that VFB is strongly affected by the gate interface electrode.show moreshow less

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Author: Grzegorz Lupina, Jarek Marek Dabrowski, Peter Formanek, Dieter SchmeißerORCiD, Roland Sorge, Christian WengerORCiD, Peter Zaumseil, Hans-Joachim Müssig
ISSN:1369-8001
Title of the source (English):Materials Science in Semiconductor Processing
Document Type:Scientific journal article not peer-reviewed
Language:English
Year of publication:2004
Tag:High-k dielectrics; Interface reaction; Photoelectron spectroscopy
Volume/Year:7
Issue number:4-6
First Page:215
Last Page:220
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Angewandte Physik und Halbleiterspektroskopie
Institution name at the time of publication:Fakultät für Mathematik, Naturwissenschaften und Informatik (eBTU) / LS Angewandte Physik / Sensorik
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