• search hit 1 of 1
Back to Result List

Multi-Level Programming on Radiation-Hard 1T1R Memristive Devices for In-Memory Computing

  • This work presents a quasi-static electrical characterization of 1-transistor-1-resistor memristive structures designed following hardness-by-design techniques integrated in the CMOS fabrication process to assure multi-level capabilities in harsh radiation environments. Modulating the gate voltage of the enclosed layout transistor connected in series with the memristive device, it was possible to achieve excellent switching capabilities from a single high resistance state to a total of eight different low resistance states (more than 3 bits). Thus, the fabricated devices are suitable for their integration in larger in-memory computing systems and in multi-level memory applications. Index Terms—radiation-hard, hardness-by-design, memristive devices, Enclosed Layout Transistor, in-memory computing

Export metadata

Additional Services

Search Google Scholar
Metadaten
Author: Emilio Perez-Bosch Quesada, Tommaso Rizzi, Aditya Gupta, Mamathamba Kalishettyhalli Mahadevaiah, Andreas Schubert, Stefan Pechmann, Ruolan Jia, Max Uhlmann, Amelie Hagelauer, Christian WengerORCiD, Eduardo Perez
DOI:https://doi.org/10.1109/CDE58627.2023.10339525
ISBN:979-8-3503-0240-0
Title of the source (English):14th Spanish Conference on Electron Devices (CDE 2023), Valencia, Spain, 06-08 June 2023
Publisher:Institute of Electrical and Electronics Engineers (IEEE)
Document Type:Conference publication peer-reviewed
Language:English
Year of publication:2023
Tag:RRAM
Number of pages:4
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Halbleitermaterialien
Einverstanden ✔
Diese Webseite verwendet technisch erforderliche Session-Cookies. Durch die weitere Nutzung der Webseite stimmen Sie diesem zu. Unsere Datenschutzerklärung finden Sie hier.