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Wafer-Scale Synthesis of Graphene on Sapphire: Toward Fab-Compatible Graphene

  • The adoption of graphene in electronics, optoelectronics, and photonics is hindered by the difficulty in obtaining high‐quality material on technologically relevant substrates, over wafer‐scale sizes, and with metal contamination levels compatible with industrial requirements. To date, the direct growth of graphene on insulating substrates has proved to be challenging, usually requiring metal‐catalysts or yielding defective graphene. In this work, a metal‐free approach implemented in commercially available reactors to obtain high‐quality monolayer graphene on c‐plane sapphire substrates via chemical vapor deposition is demonstrated. Low energy electron diffraction, low energy electron microscopy, and scanning tunneling microscopy measurements identify the Al‐rich reconstruction of sapphire to be crucial for obtaining epitaxial graphene. Raman spectroscopy and electrical transport measurements reveal high‐quality graphene with mobilities consistently above 2000 cm2 V−1 s−1. The process is scaled up to 4 and 6 in. wafers sizes and metalThe adoption of graphene in electronics, optoelectronics, and photonics is hindered by the difficulty in obtaining high‐quality material on technologically relevant substrates, over wafer‐scale sizes, and with metal contamination levels compatible with industrial requirements. To date, the direct growth of graphene on insulating substrates has proved to be challenging, usually requiring metal‐catalysts or yielding defective graphene. In this work, a metal‐free approach implemented in commercially available reactors to obtain high‐quality monolayer graphene on c‐plane sapphire substrates via chemical vapor deposition is demonstrated. Low energy electron diffraction, low energy electron microscopy, and scanning tunneling microscopy measurements identify the Al‐rich reconstruction of sapphire to be crucial for obtaining epitaxial graphene. Raman spectroscopy and electrical transport measurements reveal high‐quality graphene with mobilities consistently above 2000 cm2 V−1 s−1. The process is scaled up to 4 and 6 in. wafers sizes and metal contamination levels are retrieved to be within the limits for back‐end‐of‐line integration. The growth process introduced here establishes a method for the synthesis of wafer‐scale graphene films on a technologically viable basis.show moreshow less

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Author: Neeraj Mishra, Stiven FortiORCiD, Filippo FabbriORCiD, Leonardo MartiniORCiD, Clifford McAleese, Ben R. Conran, Patrick R. WhelanORCiD, Abhay Shivayogimath, Bjarke S. Jessen, Lars BußORCiD, Jens FaltaORCiD, Ilirjan Aliaj, Stefano Roddaro, Jan Ingo FlegeORCiD, Peter BøggildORCiD, Kenneth B. K. Teo, Camilla ColettiORCiD
DOI:https://doi.org/10.1002/smll.201904906
ISSN:1613-6810
ISSN:1613-6829
Title of the source (English):Small
Document Type:Scientific journal article peer-reviewed
Language:English
Year of publication:2019
Tag:graphene on insulator; interface; metal free; sapphire; wafer scale
Volume/Year:15
Issue number:50
Number of pages:8
Article number:1904906
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Angewandte Physik und Halbleiterspektroskopie
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