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Tackling the Low Conductance State Drift through Incremental Reset and Verify in RRAM Arrays

  • Resistive switching memory (RRAM) is a promising technology for highly efficient computing scenarios. RRAM arrays enabled the acceleration of neural networks for artificial intelligence and the creation of In-Memory Computing circuits. However, the arrays are affected by several issues materializing in conductance variations that might cause severe performance degradation in those applications. Among those, one is related to the drift of the low conductance states appearing immediately at the end of program and verify algorithms that are fundamental for an accurate Multi-level conductance operation. In this work, we tackle the issue by developing an Incremental Reset and Verify technique showing enhanced variability and reliability features compared with a traditional refresh-based approach.

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Metadaten
Author: Andrea Baroni, Cristian Zambelli, Piero Olivo, Eduardo Perez, Christian WengerORCiD, Daniele Ielmini
DOI:https://doi.org/10.1109/IIRW53245.2021.9635613
ISBN:978-1-6654-1794-5
ISBN:978-1-6654-1795-2
ISSN:2374-8036
Title of the source (English):2021 IEEE International Integrated Reliability Workshop (IIRW), South Lake Tahoe, CA, USA, 10 December 2021
Publisher:Institute of Electrical and Electronics Engineers (IEEE)
Document Type:Conference publication peer-reviewed
Language:English
Year of publication:2021
Tag:RRAM; neural network; resistive switching
Number of pages:5
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Halbleitermaterialien
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