TY - GEN A1 - Zaumseil, Peter A1 - Kozłowski, Grzegorz A1 - Schubert, Markus Andreas A1 - Yamamoto, Yuji A1 - Bauer, J. A1 - Schülli, Tobias U. A1 - Tillack, Bernd A1 - Schroeder, Thomas T1 - The role of SiGe buffer in growth and relaxation of Ge on free-standing Si(001) nanopillars T2 - Nanotechnology Y1 - 2012 SN - 1361-6528 VL - 23 IS - 35 SP - 355706 ER - TY - GEN A1 - Bauer, J. A1 - Yamamoto, Yuji A1 - Zaumseil, Peter A1 - Fursenko, Oksana A1 - Schulz, K. A1 - Kozłowski, Grzegorz A1 - Schubert, Markus Andreas A1 - Schroeder, Thomas A1 - Tillack, Bernd T1 - Nanostructured Silicon for Ge Nanoheteroepitaxy T2 - Microelectronics Engineering Y1 - 2012 SN - 0167-9317 VL - 97 SP - 169 EP - 172 ER - TY - GEN A1 - Pieper, H. H. A1 - Derks, C. A1 - Zöllner, Marvin Hartwig A1 - Olbrich, R. A1 - Troeger, L. A1 - Schroeder, Thomas A1 - Neumann, M. A1 - Reichling, M. T1 - Morphology and nanostructure of CeO2(111) surfaces of single crystals and of Si(111) supported ceria films, T2 - Physical Chemistry Chemical Physics Y1 - 2012 U6 - https://doi.org/10.1039/C2CP42733H SN - 1463-9084 VL - 14 IS - 44 SP - 15361 EP - 15368 ER - TY - GEN A1 - Pechmann, Stefan A1 - Mai, Timo A1 - Völkel, Matthias A1 - Mahadevaiah, Mamathamba Kalishettyhalli A1 - Perez, Eduardo A1 - Perez-Bosch Quesada, Emilio A1 - Reichenbach, Marc A1 - Wenger, Christian A1 - Hagelauer, Amelie T1 - A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells T2 - Electronics N2 - In this work, we present an integrated read and programming circuit for Resistive Random Access Memory (RRAM) cells. Since there are a lot of different RRAM technologies in research and the process variations of this new memory technology often spread over a wide range of electrical properties, the proposed circuit focuses on versatility in order to be adaptable to different cell properties. The circuit is suitable for both read and programming operations based on voltage pulses of flexible length and height. The implemented read method is based on evaluating the voltage drop over a measurement resistor and can distinguish up to eight different states, which are coded in binary, thereby realizing a digitization of the analog memory value. The circuit was fabricated in the 130 nm CMOS process line of IHP. The simulations were done using a physics-based, multi-level RRAM model. The measurement results prove the functionality of the read circuit and the programming system and demonstrate that the read system can distinguish up to eight different states with an overall resistance ratio of 7.9. KW - RRAM KW - Multilevel switching KW - Programming circuit Y1 - 2021 U6 - https://doi.org/10.3390/electronics10050530 SN - 2079-9292 VL - 10 IS - 5 ER - TY - GEN A1 - Skibitzki, Oliver A1 - Hatami, Fariba A1 - Yamamoto, Yuji A1 - Zaumseil, Peter A1 - Trampert, A. A1 - Schubert, Markus Andreas A1 - Tillack, Bernd A1 - Schroeder, Thomas T1 - GaP collector development for SiGe HBT performance increase: A heterostructure growth study T2 - Journal of Applied Physics Y1 - 2012 U6 - https://doi.org/10.1063/1.3701583 SN - 0021-8979 VL - 111 IS - 7 SP - 073515 EP - 073515-9 ER - TY - GEN A1 - Zaumseil, Peter A1 - Kozłowski, Grzegorz A1 - Yamamoto, Yuji A1 - Bauer, J. A1 - Schubert, Markus Andreas A1 - Schülli, Tobias U. A1 - Tillack, Bernd A1 - Schroeder, Thomas T1 - Compliant Si nanostructures on SOI for Ge nanoheteroepitaxy – a case study for lattice mismatched semiconductor integration on Si(001) T2 - Journal of Applied Physics Y1 - 2012 SN - 0021-8979 VL - 112 IS - 4 SP - 043506 EP - 043511 ER - TY - GEN A1 - Richard, Marie-Ingrid A1 - Zöllner, Marvin Hartwig A1 - Chahine, Gilbert A. A1 - Zaumseil, Peter A1 - Capellini, Giovanni A1 - Häberlen, Maik A1 - Storck, Peter A1 - Schülli, Tobias U. A1 - Schröder, Thomas T1 - Structural Mapping of Functional Ge Layers Grown on Graded SiGe Buffers for sub-10 nm CMOS Applications Using Advanced X-ray Nano-Diffraction T2 - ACS Applied Materials and Interfaces Y1 - 2015 U6 - https://doi.org/10.1021/acsami.5b08645 SN - 1944-8244 SN - 1944-8252 VL - 7 IS - 48 SP - 26696 EP - 26700 ER - TY - GEN A1 - Reiser, Daniel A1 - Reichenbach, Marc A1 - Rizzi, Tommaso A1 - Baroni, Andrea A1 - Fritscher, Markus A1 - Wenger, Christian A1 - Zambelli, Cristian A1 - Bertozzi, Davide T1 - Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations T2 - 21st IEEE Interregional NEWCAS Conference (NEWCAS), 26-28 June 2023, Edinburgh, United Kingdom N2 - In-memory computing with resistive-switching random access memory (RRAM) crossbar arrays has the potential to overcome the major bottlenecks faced by digital hardware for data-heavy workloads such as deep learning. However, RRAM devices are subject to several non-idealities that result in significant inference accuracy drops compared with software baseline accuracy. A critical one is related to the drift of the conductance states appearing immediately at the end of program and verify algorithms that are mandatory for accurate multi-level conductance operation. The support of drift models in state-of-the-art simulation tools of memristive computationin-memory is currently only in the early stage, since they overlook key device- and array-level parameters affecting drift resilience such as the programming algorithm of RRAM cells, the choice of target conductance states and the weight-toconductance mapping scheme. The goal of this paper is to fully expose these parameters to RRAM crossbar designers as a multi-dimensional optimization space of drift resilience. For this purpose, a simulation framework is developed, which comes with the suitable abstractions to propagate the effects of those RRAM crossbar configuration parameters to their ultimate implications over inference performance stability. KW - RRAM Y1 - 2023 SN - 979-8-3503-0024-6 SN - 979-8-3503-0025-3 U6 - https://doi.org/10.1109/NEWCAS57931.2023 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Zöllner, Marvin Hartwig A1 - Richard, Marie-Ingrid A1 - Chahine, Gilbert A. A1 - Zaumseil, Peter A1 - Reich, Christian A1 - Capellini, Giovanni A1 - Montalenti, Francesco A1 - Marzegalli, Anna A1 - Xie, Ya-Hong A1 - Schülli, Tobias U. A1 - Häberlen, Maik A1 - Storck, Peter A1 - Schroeder, Thomas T1 - Imaging structure and composition homogeneity of 300 mm SiGe virtual substrates for advanced CMOS applications by scanning X-ray diffraction microscopy T2 - ACS Applied Materials and Interfaces Y1 - 2015 U6 - https://doi.org/10.1021/am508968b SN - 1944-8252 VL - 7 IS - 17 SP - 9031 EP - 9037 ER - TY - GEN A1 - Tarnawska, Lidia Lupina A1 - Zöllner, Marvin Hartwig A1 - Niermann, T. A1 - Dietrich, Burkhart A1 - Capellini, Giovanni A1 - Thapa, Sarad A1 - Häberlen, Maik A1 - Lehmann, M. A1 - Storck, Peter A1 - Schröder, Thomas T1 - Zero Lattice Mismatch and Truly Single Crystalline ScN Buffer Layers for GaN Growth on Silicon T2 - Applied Physics Letters Y1 - 2015 U6 - https://doi.org/10.1063/1.4935856 SN - 1077-3118 SN - 0003-6951 VL - 107 IS - 20 SP - 201907 ER -