TY - GEN A1 - Lehniger, Kai A1 - Langendörfer, Peter T1 - Comment on ‘‘RIO: Return Instruction Obfuscation for Bare-Metal IoT Devices’’ T2 - IEEE Access N2 - This is a comment on “RIO: Return Instruction Obfuscation for Bare-Metal IoT Devices.” RIO prevents finding gadgets for return-oriented programming attacks by encrypting return instructions. This paper shows flaws in the design of RIO that allow for the easy retrieval of the plaintext return instructions without decrypting them. Additionally, changes are proposed to improve upon the original idea. KW - ARM KW - Internet of Things KW - Return-oriented programming KW - Security Y1 - 2025 U6 - https://doi.org/10.1109/ACCESS.2025.3568598 SN - 2169-3536 VL - 13 SP - 90358 EP - 90361 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Lehniger, Kai A1 - Langendorfer, Peter T1 - Elevating parallel shadow stack concepts for architectures with register windows T2 - IEEE transactions on dependable and secure computing N2 - Register windows are a processor feature that was originally developed to reduce the frequency for register spilling. This paper investigates how this mechanism can be used to implement a parallel shadow stack to protect return addresses from being corrupted. Furthermore, multiple improvements based on properties directly following the usage of register windows are proposed. Different configurations of parallel shadow stacks are evaluated based on prototype implementations on an ESP32 microcontroller and tested with different benchmarks. Performance overheads below 0.01% for CoreMark, below 3% for the worst case in MbedsTLS, and a worst case scenario of 22.153% for a recursive function show that our concepts are able to be efficiently developed even for embedded devices like the ESP32. KW - Buffer overflow KW - Shadow stack KW - Return-oriented programming KW - Register windows KW - Xtensa KW - ESP32 Y1 - 2025 U6 - https://doi.org/10.1109/TDSC.2025.3604556 SN - 1545-5971 SN - 1941-0018 SP - 1 EP - 18 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - Piscataway, NJ ER -