TY - GEN A1 - Venkatesha, Shishira S A1 - Killat, Dirk T1 - Design of a fully differential track-and-hold amplifier T2 - 2025 Kleinheubach Conference N2 - This paper presents a fully differential track-and-hold amplifier (THA) architecture for high-speed applications. The proposed design employs a distinctive switching arrangement that converts non-linear errors into a constant offset and provides an initialization sub-phase before tracking. The circuit utilizes two capacitors in the signal path to enable gain flexibility, providing an accurate output during hold mode. The THA was implemented in 65−nm CMOS technology with a 1.2 V supply voltage. The results of the simulation after layout demonstrate a droop rate of 2.5mV/μS, a hold-mode settling time of 2ns for a 1pF hold capacitor. KW - CMOS KW - Track-and-hold KW - Switched capacitor KW - High-speed KW - Transmission gates KW - Charge injection Y1 - 2025 U6 - https://doi.org/10.23919/IEEECONF67516.2025.11225213 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER -