TY - GEN A1 - Capista, Daniele A1 - Lukose, Rasuole A1 - Majnoon, Farnaz A1 - Lisker, Marco A1 - Wenger, Christian A1 - Lukosius, Mindaugas T1 - Study on the metal -graphene contact resistance achieved with one -dimensional contact architecture T2 - IEEE Nanotechnology Materials and Devices Conference (NMDC 2023), Paestum, Italy, 22-25 October 2023 N2 - Graphene has always been considered as one of the materials with the greatest potential for the realization of improved microelectronic and photonic devices. But to actually reach its full potential in Si CMOS technology, graphene -based devices need to overcome different challenges. They do not only need to have better performances than standard devices, but they also need to be compatible with the production of standard Si based devices. To address the first challenge the main route requires the optimization of the contact resistance, that highly reduces the devices performance, while the second challenges requires the integration of graphene inside the standard production lines used for microelectronic. In this work we used an 8” wafer pilot -line to realize our devices and we studied the behavior of the contact resistance between metal and graphene obtained by one -dimensional contact architecture between the two materials. The contact resistance has been measured by means of Transmission Line Method (TLM) with several contact patterning. KW - Graphene Y1 - 2023 SN - 979-8-3503-3546-0 U6 - https://doi.org/10.1109/NMDC57951.2023.10343775 SP - 118 EP - 119 PB - Institute of Electrical and Electronics Engineers (IEEE) ER - TY - GEN A1 - Lukosius, Mindaugas A1 - Lukose, Rasuolė A1 - Lisker, Marco A1 - Dubey, P. K. A1 - Raju, A. I. A1 - Capista, Daniele A1 - Majnoon, Farnaz A1 - Mai, A. A1 - Wenger, Christian T1 - Developments of Graphene devices in 200 mm CMOS pilot line T2 - Proc. Nanotechnology Materials and Devices Conference (NMDC 2023),Paestum, Italy, 22-25 October 2023 N2 - Due to the unique electronic band structure, graphene has opened great potential to extend the functionality of a large variety of devices. Despite the significant progress in the fabrication of various graphene based microelectronic devices, the integration of graphene devices still lack the stability and compatibility with Si-technology processes. Therefore, the investigation and preparation of graphene devices in conditions resembling as close as possible the Si technology environment is of highest importance. This study aims to explore various aspects of graphene research on a 200mm pilot line, with a focus on simulations and fabrication of graphene modulator. To be more precise, it includes design and fabrication of the layouts, necessary mask sets, creation of the flows, fabrication, and measurements of the Gr modulators on 200 mm wafers. KW - Graphene Y1 - 2023 SN - 979-8-3503-3546-0 U6 - https://doi.org/10.1109/NMDC57951.2023.10343569 SP - 505 EP - 506 PB - Institute of Electrical and Electronics Engineers (IEEE) ER - TY - GEN A1 - Maldonado, David A1 - Cantudo, Antonio A1 - Pérez, Eduardo A1 - Romero-Zaliz, Rocio A1 - Perez-Bosch Quesada, Emilio A1 - Mahadevaiah, Mamathamba Kalishettyhalli A1 - Jimenez-Molinos, Francisco A1 - Wenger, Christian A1 - Roldan, Juan Bautista T1 - TiN/Ti/HfO2/TiN Memristive Devices for Neuromorphic Computing: From Synaptic Plasticity to Stochastic Resonance T2 - Frontiers in Neuroscience N2 - We characterize TiN/Ti/HfO2/TiN memristive devices for neuromorphic computing. We analyze different features that allow the devices to mimic biological synapses and present the models to reproduce analytically some of the data measured. In particular, we have measured the spike timing dependent plasticity behavior in our devices and later on we have modeled it. The spike timing dependent plasticity model was implemented as the learning rule of a spiking neural network that was trained to recognize the MNIST dataset. Variability is implemented and its influence on the network recognition accuracy is considered accounting for the number of neurons in the network and the number of training epochs. Finally, stochastic resonance is studied as another synaptic feature.It is shown that this effect is important and greatly depends on the noise statistical characteristics. KW - RRAM KW - Neural network Y1 - 2023 U6 - https://doi.org/10.3389/fnins.2023.1271956 SN - 1662-4548 VL - 17 ER - TY - GEN A1 - Perez-Bosch Quesada, Emilio A1 - Rizzi, Tommaso A1 - Gupta, Aditya A1 - Mahadevaiah, Mamathamba Kalishettyhalli A1 - Schubert, Andreas A1 - Pechmann, Stefan A1 - Jia, Ruolan A1 - Uhlmann, Max A1 - Hagelauer, Amelie A1 - Wenger, Christian A1 - Pérez, Eduardo T1 - Multi-Level Programming on Radiation-Hard 1T1R Memristive Devices for In-Memory Computing T2 - 14th Spanish Conference on Electron Devices (CDE 2023), Valencia, Spain, 06-08 June 2023 N2 - This work presents a quasi-static electrical characterization of 1-transistor-1-resistor memristive structures designed following hardness-by-design techniques integrated in the CMOS fabrication process to assure multi-level capabilities in harsh radiation environments. Modulating the gate voltage of the enclosed layout transistor connected in series with the memristive device, it was possible to achieve excellent switching capabilities from a single high resistance state to a total of eight different low resistance states (more than 3 bits). Thus, the fabricated devices are suitable for their integration in larger in-memory computing systems and in multi-level memory applications. Index Terms—radiation-hard, hardness-by-design, memristive devices, Enclosed Layout Transistor, in-memory computing KW - RRAM Y1 - 2023 SN - 979-8-3503-0240-0 U6 - https://doi.org/10.1109/CDE58627.2023.10339525 PB - Institute of Electrical and Electronics Engineers (IEEE) ER - TY - GEN A1 - Pérez, Eduardo A1 - Maldonado, David A1 - Mahadevaiah, Mamathamba Kalishettyhalli A1 - Perez-Bosch Quesada, Emilio A1 - Cantudo, Antonio A1 - Jimenez-Molinos, Francisco A1 - Wenger, Christian A1 - Roldan, Juan Bautista T1 - A comparison of resistive switching parameters for memristive devices with HfO2 monolayers and Al2O3/HfO2 bilayers at the wafer scale T2 - 14th Spanish Conference on Electron Devices (CDE 2023), Valencia, Spain, 06-08 June 2023 N2 - Memristive devices integrated in 200 mm wafers manufactured in 130 nm CMOS technology with two different dielectrics, namely, a HfO2 monolayer and an Al2O3/HfO2 bilayer, have been measured. The cycle-to-cycle (C2C) and device-todevice (D2D) variability have been analyzed at the wafer scale using different numerical methods to extract the set (Vset) and reset (Vreset) voltages. Some interesting differences between both technologies were found in terms of switching characteristics KW - RRAM Y1 - 2023 SN - 979-8-3503-0240-0 U6 - https://doi.org/10.1109/CDE58627.2023.10339417 PB - Institute of Electrical and Electronics Engineers (IEEE) ER - TY - GEN A1 - Reiser, Daniel A1 - Reichenbach, Marc A1 - Rizzi, Tommaso A1 - Baroni, Andrea A1 - Fritscher, Markus A1 - Wenger, Christian A1 - Zambelli, Cristian A1 - Bertozzi, Davide T1 - Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations T2 - 21st IEEE Interregional NEWCAS Conference (NEWCAS), 26-28 June 2023, Edinburgh, United Kingdom N2 - In-memory computing with resistive-switching random access memory (RRAM) crossbar arrays has the potential to overcome the major bottlenecks faced by digital hardware for data-heavy workloads such as deep learning. However, RRAM devices are subject to several non-idealities that result in significant inference accuracy drops compared with software baseline accuracy. A critical one is related to the drift of the conductance states appearing immediately at the end of program and verify algorithms that are mandatory for accurate multi-level conductance operation. The support of drift models in state-of-the-art simulation tools of memristive computationin-memory is currently only in the early stage, since they overlook key device- and array-level parameters affecting drift resilience such as the programming algorithm of RRAM cells, the choice of target conductance states and the weight-toconductance mapping scheme. The goal of this paper is to fully expose these parameters to RRAM crossbar designers as a multi-dimensional optimization space of drift resilience. For this purpose, a simulation framework is developed, which comes with the suitable abstractions to propagate the effects of those RRAM crossbar configuration parameters to their ultimate implications over inference performance stability. KW - RRAM Y1 - 2023 SN - 979-8-3503-0024-6 SN - 979-8-3503-0025-3 U6 - https://doi.org/10.1109/NEWCAS57931.2023 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Franck, Max A1 - Dabrowski, Jarek A1 - Schubert, Markus Andreas A1 - Vignaud, Dominique A1 - Achehboune, Mohamed A1 - Colomer, Jean‐François A1 - Henrard, Luc A1 - Wenger, Christian A1 - Lukosius, Mindaugas T1 - Investigating Impacts of Local Pressure and Temperature on CVD Growth of Hexagonal Boron Nitride on Ge(001)/Si T2 - Advanced Materials Interfaces N2 - AbstractThe chemical vapor deposition (CVD) growth of hexagonal boron nitride (hBN) on Ge substrates is a promising pathway to high‐quality hBN thin films without metal contaminations for microelectronic applications, but the effect of CVD process parameters on the hBN properties is not well understood yet. The influence of local changes in pressure and temperature due to different reactor configurations on the structure and quality of hBN films grown on Ge(001)/Si is studied. Injection of the borazine precursor close to the sample surface results in an inhomogeneous film thickness, attributed to an inhomogeneous pressure distribution at the surface, as shown by computational fluid dynamics simulations. The additional formation of nanocrystalline islands is attributed to unfavorable gas phase reactions due to the radiative heating of the injector. Both issues are mitigated by increasing the injector‐sample distance, leading to an 86% reduction in pressure variability on the sample surface and a 200 °C reduction in precursor temperature. The resulting hBN films exhibit no nanocrystalline islands, improved thickness homogeneity, and high crystalline quality (Raman FWHM = 23 cm−1). This is competitive with hBN films grown on other non‐metal substrates but achieved at lower temperature and with a low thickness of only a few nanometers. KW - Boron Nitride KW - 2D material Y1 - 2025 U6 - https://doi.org/10.1002/admi.202400467 SN - 2196-7350 VL - 12 IS - 1 PB - Wiley ER - TY - GEN A1 - Wen, Jianan A1 - Vargas, Fabian Luis A1 - Zhu, Fukun A1 - Reiser, Daniel A1 - Baroni, Andrea A1 - Fritscher, Markus A1 - Perez, Eduardo A1 - Reichenbach, Marc A1 - Wenger, Christian A1 - Krstic, Milos T1 - RRAMulator : an efficient FPGA-based emulator for RRAM crossbar with device variability and energy consumption evaluation T2 - Microelectronics Reliability N2 - The in-memory computing (IMC) systems based on emerging technologies have gained significant attention due to their potential to enhance performance and energy efficiency by minimizing data movement between memory and processing unit, which is especially beneficial for data-intensive applications. Designing and evaluating systems utilizing emerging memory technologies, such as resistive RAM (RRAM), poses considerable challenges due to the limited support from electronics design automation (EDA) tools for rapid development and design space exploration. Additionally, incorporating technology-dependent variability into system-level simulations is critical to accurately assess the impact on system reliability and performance. To bridge this gap, we propose RRAMulator, a field-programmable gate array (FPGA) based hardware emulator for RRAM crossbar array. To avoid the complex device models capturing the nonlinear current–voltage (IV) relationships that degrade emulation speed and increase hardware utilization, we propose a device and variability modeling approach based on device measurements. We deploy look-up tables (LUTs) for device modeling and use the multivariate kernel density estimation (KDE) method to augment existing data, extending data variety and avoiding repetitive data usage. The proposed emulator achieves cycle-accurate, real-time emulations and provides information such as latency and energy consumption for matrix mapping and vector–matrix multiplications (VMMs). Experimental results show a significant reduction in emulation time compared to conventional behavioral simulations. Additionally, an RRAM-based discrete Fourier transform (DFT) accelerator is analyzed as a case study featuring a range of in-depth system assessments. KW - RRAM Y1 - 2025 U6 - https://doi.org/10.1016/j.microrel.2025.115630 SN - 0026-2714 VL - 168 SP - 1 EP - 10 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Spetzler, Benjamin A1 - Fritscher, Markus A1 - Park, Seongae A1 - Kim, Nayoun A1 - Wenger, Christian A1 - Ziegler, Martin T1 - AI-driven model for optimized pulse programming of memristive devices T2 - APL Machine Learning N2 - Next-generation artificial intelligence (AI) hardware based on memristive devices offers a promising approach to reducing the increasingly large energy consumption of AI applications. However, programming memristive AI hardware to achieve a desired synaptic weight configuration remains challenging because it requires accurate and energy-efficient algorithms for selecting the optimal weight-update pulses. Here, we present a computationally efficient AI model for predicting the weight update of memristive devices and guiding device programming. The synaptic weight-update behavior of bilayer HfO2/TiO2 memristive devices is characterized over a range of pulse parameters to provide experimental data for the AI model. Three different artificial neural network (ANN) configurations are trained and evaluated regarding the amount of training data required for accurate predictions and the computational costs. Finally, we apply the model to an antipulse weight-update process to demonstrate its performance. The results show that accurate and computationally inexpensive predictions are possible with comparatively few datasets and small ANNs. The normalized weight-update processes are predicted with accuracies comparable with larger model architectures but require only 896 floating point operations and 8.33 nJ per inference. This makes the model a promising candidate for integration into AI-driven device controllers as a precise and energy-efficient solution for memristive device programming. KW - RRAM KW - Neural network KW - Device model Y1 - 2025 U6 - https://doi.org/10.1063/5.0251113 SN - 2770-9019 VL - 3 IS - 2 SP - 1 EP - 7 PB - AIP Publishing ER - TY - GEN A1 - Fritscher, Markus A1 - Uhlmann, Max A1 - Ostrovskyy, Philip A1 - Reiser, Daniel A1 - Chen, Junchao A1 - Wen, Jianan A1 - Schulze, Carsten A1 - Kahmen, Gerhard A1 - Fey, Dietmar A1 - Reichenbach, Marc A1 - Krstic, Milos A1 - Wenger, Christian ED - Wenger, Christian T1 - RISC-V CPU design using RRAM-CMOS standard cells T2 - IEEE transactions on very large scale integration (VLSI) systems N2 - The breakdown of Dennard scaling has been the driver for many innovations such as multicore CPUs and has fueled the research into novel devices such as resistive random access memory (RRAM). These devices might be a means to extend the scalability of integrated circuits since they allow for fast and nonvolatile operation. Unfortunately, large analog circuits need to be designed and integrated in order to benefit from these cells, hindering the implementation of large systems. This work elaborates on a novel solution, namely, creating digital standard cells utilizing RRAM devices. Albeit this approach can be used both for small gates and large macroblocks, we illustrate it for a 2T2R-cell. Since RRAM devices can be vertically stacked with transistors, this enables us to construct a nand standard cell, which merely consumes the area of two transistors. This leads to a 25% area reduction compared to an equivalent CMOS nand gate. We illustrate achievable area savings with a half-adder circuit and integrate this novel cell into a digital standard cell library. A synthesized RISC-V core using RRAM-based cells results in a 10.7% smaller area than the equivalent design using standard CMOS gates. KW - RRAM KW - Logic gates Y1 - 2025 UR - https://ieeexplore.ieee.org/document/10960690 U6 - https://doi.org/10.1109/TVLSI.2025.3554476 SN - 1063-8210 SP - 1 EP - 9 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - New York ER - TY - GEN A1 - Strobel, Carsten A1 - Chavarin, Carlos A. A1 - Knaut, Martin A1 - Wenger, Christian A1 - Heinzig, André A1 - Mikolajick, Thomas T1 - Demonstration of a graphene adjustable‐barriers phototransistor with tunable ultra‐high responsivity T2 - Advanced Optical Materials N2 - The development of high‐speed dual‐band photodetectors with high responsivity is important for several applications such as optical communication, biomedical imaging or spectroscopy. In this work, a phototransistor with ultra‐high responsivity is demonstrated, which potentially also allows for very high bandwidths. The device is called graphene adjustable‐barriers phototransistor and is potentially capable for dual‐band detection in the visible‐infrared (VIS‐IR) range. A material combination of intrinsic hydrogenated amorphous silicon, graphene, and n‐type germanium (n‐Ge) is used for the demonstrator. The device operation is based on the light induced modulation of the graphene Fermi energy level and Schottky barrier heights. For the first time, the functional mechanism of the device is successfully demonstrated in the VIS range with responsivities exceeding 107 A/W at a gate voltage of 20V. The bandwidth of the device is 1.2 kHz and is so far limited by the defective gate material hydrogenated amorphous silicon and relaxed feature sizes of the demonstrator. These results are an important step toward a new generation of high‐responsivity high‐speed photo detection devices. KW - Graphene KW - Detector Y1 - 2025 U6 - https://doi.org/10.1002/adom.202500344 SN - 2195-1071 SP - 1 EP - 9 PB - Wiley-VCH GmbH CY - Weinheim ER - TY - GEN A1 - Morales, Carlos A1 - Gertig, Max A1 - Kot, Małgorzata A1 - Alvarado, Carlos A1 - Schubert, Markus Andreas A1 - Zoellner, Marvin Hartwig A1 - Wenger, Christian A1 - Henkel, Karsten A1 - Flege, Jan Ingo T1 - In situ X‐ray photoelectron spectroscopy study of atomic layer deposited cerium oxide on SiO₂ : substrate influence on the reaction mechanism during the early stages of growth T2 - Advanced materials interfaces N2 - Thermal atomic layer deposition (ALD) of cerium oxide using commercial Ce(thd)4 precursor and O3 on SiO2 substrates is studied employing in‐situ X‐ray photoelectron spectroscopy (XPS). The system presents a complex growth behavior determined by the change in the reaction mechanism when the precursor interacts with the substrate or the cerium oxide surface. During the first growth stage, non‐ALD side reactions promoted by the substrate affect the growth per cycle, the amount of carbon residue on the surface, and the oxidation degree of cerium oxide. On the contrary, the second growth stage is characterized by a constant growth per cycle in good agreement with the literature, low carbon residues, and almost fully oxidized cerium oxide films. This distinction between two growth regimes is not unique to the CeOx/SiO2 system but can be generalized to other metal oxide substrates. Furthermore, the film growth deviates from the ideal layer‐by‐layer mode, forming micrometric inhomogeneous and defective flakes that eventually coalesce for deposit thicknesses above 10 nm. The ALD‐cerium oxide films present less order and a higher density of defects than films grown by physical vapor deposition techniques, likely affecting their reactivity in oxidizing and reducing conditions. KW - Atomic Layer Deposition (ALD) KW - Cerium oxide KW - In-situ X-ray Photoelectron spectroscopy (in-situ XPS) KW - Growth model KW - Substrate influence Y1 - 2025 U6 - https://doi.org/10.1002/admi.202400537 SN - 2196-7350 VL - 12 IS - 5 SP - 1 EP - 13 PB - Wiley CY - Weinheim ER - TY - GEN A1 - Maldonado, D. A1 - Acal, C. A1 - Ortiz, H. A1 - Aguilera, A.M. A1 - Ruiz-Castro, J.E. A1 - Cantudo, A. A1 - Baroni, A. A1 - Dorai Swamy Reddy, K. A1 - Pechmann, S. A1 - Uhlmann, M. A1 - Wenger, Christian A1 - Pérez, E. A1 - Roldán, J.B. T1 - A comprehensive statistical study of the post-programming conductance drift in HfO2-based memristive devices T2 - Materials science in semiconductor processing N2 - The conductance drift in HfO2-based memristors is a critical reliability concern that impacts in their application in non-volatile memory and neuromorphic computing integrated circuits. In this work we present a comprehensive statistical analysis of the conductance drift behavior in resistive random access memories (RRAM) whose physics is based on valence change mechanisms. We experimentally characterize the conductance time evolution in six different resistance states and analyze the suitability of various probability distributions to model the observed variability. Our results reveal that the log-logistic probability distribution provides the best fit to the experimental data for the resistance multilevels and the measured post-programming times under consideration. Additionally, we employ an analysis of variance (ANOVA) to statistically analyze the post-programming time and current level effects on the observed variability. Finally, in the context of the Stanford compact model, we describe how variability has to be implemented to obtain the probability distribution of measured current values. KW - RRAM KW - Neural network KW - Variability Y1 - 2025 U6 - https://doi.org/10.1016/j.mssp.2025.109668 SN - 1369-8001 VL - 196 SP - 1 EP - 8 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Raju, Ashraful Islam A1 - Dubey, Pawan Kumar A1 - Lukose, Rasuole A1 - Wenger, Christian A1 - Mai, Andreas A1 - Lukosius, Mindaugas T1 - Optimized silicon nitride-spaced graphene electro-optic modulator with high efficiency and bandwidth T2 - Optical and quantum electronics N2 - Optical modulators with high modulation efficiency, large operational bandwidth, high-speed and low energy consumption is essential for the advancement of on-chip optical signal processing. To overcome the bandwidth-efficiency trade-off in graphene optical modulators, a buried silicon nitride waveguide-coupled double-layer graphene electro-absorption (EA) optical modulator has been proposed. In the proposed design, silicon nitride layer is also embedded between the two graphene layers as a dielectric spacer to enhance the graphene-light interaction. An extensive simulation has been performed to optimize the dielectric spacing layers between the two graphene for optimal device performance including the waveguide dimensions and optical modes profile. The simulated results show a high modulation efficiency of 1.1 dB/V and a modulation depth of 0.16 dB/µm, corresponding to a 15-dB extinction ratio for a 100 µm device at 1550 nm, with a 30 nm spacer and 12 V driving voltage. The proposed modulator achieves a 14 GHz bandwidth and operates over a 1050 nm broadband operation spectral range. The concurrent presence of high modulation bandwidth and efficiency renders these modulator designs highly viable for on-chip optical communication applications. KW - Graphene KW - Modulator Y1 - 2025 U6 - https://doi.org/10.1007/s11082-025-08310-0 SN - 1572-817X VL - 57 IS - 7 SP - 1 EP - 15 PB - Springer Science and Business Media LLC CY - Dordrecht ER - TY - GEN A1 - Morales, Carlos A1 - Tschammer, Rudi A1 - Pożarowska, Emilia A1 - Kosto, Julia A1 - Villar‐Garcia, Ignacio J. A1 - Pérez‐Dieste, Virginia A1 - Favaro, Marco A1 - Starr, David E. A1 - Kapuścik, Paulina A1 - Mazur, Michał A1 - Wojcieszak, Damian A1 - Domaradzki, Jarosław A1 - Alvarado, Carlos A1 - Wenger, Christian A1 - Henkel, Karsten A1 - Flege, Jan Ingo T1 - Hydrogen sensing via heterolytic H₂ activation at room temperature by atomic layer deposited ceria T2 - ChemSusChem : chemistry, sustainability, energy, materials N2 - Ultrathin atomic layer deposited ceria films (<20 nm) are capable of H2 heterolytic activation at room temperature, undergoing a significant reduction regardless of the absolute pressure, as measured under in‐situ conditions by near ambient pressure X‐ray photoelectron spectroscopy. ALD‐ceria can gradually reduce as a function of H2 concentration under H2/O2 environments, especially for diluted mixtures below 10 %. At room temperature, this reduction is limited to the surface region, where the hydroxylation of the ceria surface induces a charge transfer towards the ceria matrix, reducing Ce4+ cations to Ce3+. Thus, ALD‐ceria replicates the expected sensing mechanism of metal oxides at low temperatures without using any noble metal decorating the oxide surface to enhance H2 dissociation. The intrinsic defects of the ALD deposit seem to play a crucial role since the post‐annealing process capable of healing these defects leads to decreased film reactivity. The sensing behavior was successfully demonstrated in sensor test structures by resistance changes towards low concentrations of H2 at low operating temperatures without using noble metals. These promising results call for combining ALD‐ceria with more conductive metal oxides, taking advantage of the charge transfer at the interface and thus modifying the depletion layer formed at the heterojunction. KW - Atomic Layer Deposition KW - Ceria KW - Hydrogen Sensing KW - X-Ray photoelectron spectroscopy KW - Raman spectroscopy KW - Resitive sensor Y1 - 2025 U6 - https://doi.org/10.1002/cssc.202402342 SN - 1864-5631 VL - 18 IS - 13 SP - 1 EP - 13 PB - Wiley-VCH CY - Weinheim ER - TY - GEN A1 - Fünning, Tabea A1 - Paul, Martin A1 - Manganelli, Costanza Lucia A1 - Wenger, Christian A1 - Mai, Andreas A1 - Steglich, Patrick T1 - Comparative simulation analysis of photonic ultrasound sensors based on silicon waveguides T2 - Scientific reports N2 - Pressure sensors based on photonic integrated circuits (PIC) offer the prospect of outstanding sensitivities, extreme miniaturization and have the potential for highly scalable production using CMOS compatible processing. PIC-based pressure sensors detect the change in optical properties, i.e. the intensity or phase of the optical carrier wave inside miniaturized waveguide structures. The detection of ultrasound is achieved by engineering the waveguide architecture such that a pressure causes a high change in the effective refractive index of the waveguide. A range of PIC-based pressure sensors have been reported, but a comparison of the sensitivity of the different approaches is not straightforward, since different pressure sensitive waveguide architectures as well as photonic layouts and measurement setups impact the performance. Additionally, the used sensitivity unit is not uniform throughout the different studies, further complicating a comparison. In this work, a detailed simulation study is carried out by finite element modeling of different pressure sensitive waveguide architectures for a consistent comparison. We analyze three different sensor architectures: (A) a free standing membrane located within a tiny air gap above the waveguide, (B) a waveguide located on top of a deflectable membrane as well as (C) a waveguide embedded inside a pressure-sensitive polymer cladding. The mechanical response of the structures and the resulting changes in mode propagation, i.e. the change of the effective refractive index, are analyzed. The waveguide sensitivities in RIU/MPa for different waveguide types (strip, slot) and polarization states (TE, TM) are compared. The results reveal inherent limitations of the different waveguide designs and create a basis for the selection of suitable designs for further ultrasound sensor development. Possibilities for enhancing waveguide sensitivity are identified and discussed. Additionally, we have shown that the studied approaches are extensible to SiN waveguides. KW - Ultrasound sensor Y1 - 2025 U6 - https://doi.org/10.1038/s41598-025-01953-9 SN - 2045-2322 VL - 15 IS - 1 SP - 1 EP - 13 PB - Springer Science and Business Media LLC CY - [London] ER - TY - GEN A1 - Uhlmann, Max A1 - Krysik, Milosz A1 - Wen, Jianan A1 - Frohberg, Max A1 - Baroni, Andrea A1 - Reddy, Keerthi Dorai Swamy A1 - Pérez, Eduardo A1 - Ostrovskyy, Philip A1 - Piotrowski, Krzysztof A1 - Carta, Corrado A1 - Wenger, Christian A1 - Kahmen, Gerhard T1 - A compact one-transistor-multiple-RRAM characterization platform T2 - IEEE transactions on circuits and systems I : regular papers N2 - Emerging non-volatile memories (eNVMs) such as resistive random-access memory (RRAM) offer an alternative solution compared to standard CMOS technologies for implementation of in-memory computing (IMC) units used in artificial neural network (ANN) applications. Existing measurement equipment for device characterisation and programming of such eNVMs are usually bulky and expensive. In this work, we present a compact size characterization platform for RRAM devices, including a custom programming unit IC that occupies less than 1 mm2 of silicon area. Our platform is capable of testing one-transistor-one-RRAM (1T1R) as well as one-transistor-multiple-RRAM (1TNR) cells. Thus, to the best knowledge of the authors, this is the first demonstration of an integrated programming interface for 1TNR cells. The 1T2R IMC cells were fabricated in the IHP’s 130 nm BiCMOS technology and, in combination with other parts of the platform, are able to provide more synaptic weight resolution for ANN model applications while simultaneously decreasing the energy consumption by 50 %. The platform can generate programming voltage pulses with a 3.3 mV accuracy. Using the incremental step pulse with verify algorithm (ISPVA) we achieve 5 non-overlapping resistive states per 1T1R device. Based on those 1T1R base states we measure 15 resulting state combinations in the 1T2R cells. KW - RRAM KW - Vector Matrix Multiplication Y1 - 2025 U6 - https://doi.org/10.1109/TCSI.2025.3555234 SN - 1549-8328 SP - 1 EP - 12 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - New York ER - TY - GEN A1 - Baroni, Andrea A1 - Pérez, Eduardo A1 - Reddy, Keerthi Dorai Swamy A1 - Pechmann, Stefan A1 - Wenger, Christian A1 - Ielmini, Daniele A1 - Zambelli, Cristian T1 - Enhancing RRAM reliability : exploring the effects of Al doping on HfO2-based devices T2 - IEEE transactions on device and materials reliability N2 - This study provides a comprehensive evaluation of RRAM devices based on HfO2 and Al-doped HfO2 insulators, focusing on critical performance metrics, including Forming yield, Post-Programming Stability (PPS), Fast Drift, Endurance, and Retention at elevated temperatures (125 ∘C). Aluminum doping significantly enhances device reliability and stability, improving Forming yield, reducing current drift during programming and Retention tests, and minimizing variability during Endurance cycling. While Al5%:HfO2 achieves most of the observed benefits compared to pure HfO2, Al7%:HfO2 offers incremental advantages for scenarios requiring extreme reliability. These findings position Al-doped HfO2 devices as a promising solution for RRAM-based systems in memory and neuromorphic computing, highlighting the potential trade-off between performance gains and increased fabrication complexity. This work underlines the importance of material engineering for optimizing RRAM devices in application-specific contexts. KW - RRAM KW - Memristive device Y1 - 2025 U6 - https://doi.org/10.1109/TDMR.2025.3581061 SN - 1530-4388 SN - 1558-2574 SP - 1 EP - 9 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - New York ER - TY - GEN A1 - Uhlmann, Max A1 - Rizzi, Tommaso A1 - Wen, Jianan A1 - Quesada, Emilio Pérez-Bosch A1 - Beattie, Bakr Al A1 - Ochs, Karlheinz A1 - Pérez, Eduardo A1 - Ostrovskyy, Philip A1 - Carta, Corrado A1 - Wenger, Christian A1 - Kahmen, Gerhard T1 - End-to-end design flow for resistive neural accelerators T2 - IEEE transactions on computer-aided design of integrated circuits and systems N2 - Neural hardware accelerators have demonstrated notable energy efficiency in tackling tasks, which can be adapted to artificial neural network (ANN) structures. Research is currently directed towards leveraging resistive random-access memories (RRAMs) among various memristive devices. In conjunction with complementary metal-oxide semiconductor (CMOS) technologies within integrated circuits (ICs), RRAM devices are used to build such neural accelerators. In this study, we present a neural accelerator hardware design and verification flow, which uses a lookup table (LUT)-based Verilog-A model of IHP’s one-transistor-one-RRAM (1T1R) cell. In particular, we address the challenges of interfacing between abstract ANN simulations and circuit analysis by including a tailored Python wrapper into the design process for resistive neural hardware accelerators. To demonstrate our concept, the efficacy of the proposed design flow, we evaluate an ANN for the MNIST handwritten digit recognition task, as well as for the CIFAR-10 image recognition task, with the last layer verified through circuit simulation. Additionally, we implement different versions of a 1T1R model, based on quasi-static measurement data, providing insights on the effect of conductance level spacing and device-to-device variability. The circuit simulations tackle both schematic and physical layout assessment. The resulting recognition accuracies exhibit significant differences between the purely application-level PyTorch simulation and our proposed design flow, highlighting the relevance of circuit-level validation for the design of neural hardware accelerators. KW - RRAM Y1 - 2025 U6 - https://doi.org/10.1109/TCAD.2025.3597237 SN - 0278-0070 SN - 1937-4151 SP - 1 EP - 5 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - New York ER - TY - GEN A1 - Blumenstein, Alan A1 - Pérez, Eduardo A1 - Wenger, Christian A1 - Dersch, Nadine A1 - Kloes, Alexander A1 - Iñíguez, Benjamín A1 - Schwarz, Mike T1 - Evaluating device variability in RRAM-based single- and multi-layer perceptrons T2 - 2025 32nd International Conference on Mixed Design of Integrated Circuits and System (MIXDES) N2 - This work investigates the impact of stochastic weight variations in hardware implementations of artificial neural networks, focusing on a Single-Layer Perceptron and Multi-Layer Perceptrons. A variable neural network model is introduced, applying Gaussian variability to synaptic weights based on an adjustment rate, which controls the proportion of affected weights. By studying how stochastic variations affect accuracy, simulations under device-to-device and cycle-to-cycle variation conditions demonstrate that Single-Layer Perceptrons are more sensitive to weight variations, while Multi-Layer perceptrons show greater robustness. Additionally, stochastic quantization improves the performance of Multi-Layer Perceptrons but has minimal effect on Single-Layer Perceptrons. KW - RRAM Y1 - 2025 SN - 978-83-63578-27-5 U6 - https://doi.org/10.23919/MIXDES66264.2025.11092102 SP - 74 EP - 77 PB - IEEE CY - New York ER - TY - GEN A1 - Dubey, Pawan Kumar A1 - Raju, Ashraful Islam A1 - Lukose, Rasuole A1 - Wenger, Christian A1 - Lukosius, Mindaugas T1 - Optimizing graphene ring modulators : a comparative study of straight, bent, and racetrack geometries T2 - Nanomaterials N2 - Graphene-based micro-ring modulators are promising candidates for next-generation optical interconnects, offering compact footprints, broadband operation, and CMOS compatibility. However, most demonstrations to date have relied on conventional straight bus coupling geometries, which limit design flexibility and require extremely small coupling gaps to reach critical coupling. This work presents a comprehensive comparative analysis of straight, bent, and racetrack bus geometries in graphene-on-silicon nitride (Si₃N₄) micro-ring modulators operating near 1.31 µm. Based on finite-difference time-domain simulation results, a proposed racetrack-based modulator structure demonstrates that extending the coupling region enables critical coupling at larger gaps—up to 300 nm—while preserving high modulation efficiency. With only 6–12% graphene coverage, this geometry achieves extinction ratios of up to 28 dB and supports electrical bandwidths approaching 90 GHz. Findings from this work highlight a new co-design framework for coupling geometry and graphene coverage, offering a pathway to high-speed and high-modulation-depth graphene photonic modulators suitable for scalable integration in next-generation photonic interconnects devices. KW - Graphene Y1 - 2025 U6 - https://doi.org/10.3390/nano15151158 SN - 2079-4991 VL - 15 IS - 15 SP - 1 EP - 17 PB - MDPI AG CY - Basel ER - TY - GEN A1 - Kalra, Amanpreet A1 - Alvarado Chavarin, Carlos A1 - Nitsch, Paul-Gregor A1 - Tschammer, Rudi A1 - Flege, Jan Ingo A1 - Ratzke, Markus A1 - Zoellner, Marvin Hartwig A1 - Schubert, Markus Andreas A1 - Wenger, Christian A1 - Fischer, Inga Anita T1 - Deposition of CeOₓ/SnOₓ-based thin films via RF magnetron sputtering for resistive gas sensing applications T2 - Physica B, Condensed matter N2 - Cerium oxide-tin oxide (CeOx/SnOx) thin films with varying Sn content were deposited using RF magnetron sputtering and investigated for hydrogen sensing applications. Structural, compositional, and morphological properties were characterized using X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), transmission electron microscopy (TEM), and energy-dispersive X-ray spectroscopy (EDX). Gas sensing measurements showed effective hydrogen detection at room temperature, with the sensitivity strongly influenced by Sn content and oxygen vacancy concentration. Higher Sn concentration enhanced the sensing response, which was correlated with microstructural features obtained from AFM and EDX, as well as with the presence of Ce3+ and Ce4+ oxidation states identified by XPS. This study highlights the potential of CeOx/SnOx thin films for possible back-end-of-line integration and provides proof-of-principle for room-temperature hydrogen sensing. KW - RF magnetron sputtering KW - CeOx/SnOx thin film KW - Room temperature KW - Hydrogen sensing Y1 - 2026 U6 - https://doi.org/10.1016/j.physb.2025.418098 SN - 0921-4526 VL - 723 SP - 1 EP - 7 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Wen, Jianan A1 - Baroni, Andrea A1 - Uhlmann, Max A1 - Perez, Eduardo A1 - Wenger, Christian A1 - Krstic, Milos T1 - ReFFT : an energy-efficient RRAM-based FFT accelerator T2 - IEEE transactions on computer-aided design of integrated circuits and systems N2 - The fast Fourier transform (FFT) is a highly efficient algorithm for computing the discrete Fourier transform (DFT). It is widely employed in various applications, including digital communication, image processing, and signal analysis. Recently, in-memory computing architectures based on emerging technologies, such as resistive RAM (RRAM), have demonstrated promising performance with low hardware cost for data-intensive applications. However, directly mapping FFT onto RRAM crossbars is challenging because the algorithm relies on many small, sequential butterfly operations, while cross-bars are optimized for large-scale, highly parallel vector–matrix multiplications (VMMs). In this paper, we introduce ReFFT, a system architecture that reformulates FFT computations for efficient execution on RRAM crossbars. ReFFT combines the reduced computational complexity of FFT with the parallel VMM capability of RRAM. We incorporate measured device data into our framework to analyze the effect of variability and develop an adaptive mapping scheme that improves twiddle-factor programming accuracy, leading to a 9.9 dB peak signal-to-noise ratio (PSNR) improvement for a 256-point FFT. Compared with prior RRAM-based DFT designs, ReFFT achieves up to 4.6× and 19.5× higher energy efficiency for 256- and 2048-point FFTs, respectively. The system is further validated in digital communication and satellite image compression tasks. KW - RRAM KW - Accelerator Y1 - 2025 U6 - https://doi.org/10.1109/TCAD.2025.3627146 SN - 0278-0070 SP - 1 EP - 14 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Dersch, Nadine A1 - Perez, Eduardo A1 - Wenger, Christian A1 - Lanza, Mario A1 - Zhu, Kaichen A1 - Schwarz, Mike A1 - Iñíguez, Benjamín A1 - Kloes, Alexander T1 - Statistical model for the calculation of conductance variations of memristive devices T2 - 2025 IEEE European Solid-State Electronics Research Conference (ESSERC) N2 - This paper presents a statistical model which calculates the expected conductance variations from device to device or from cycle to cycle of memristive devices. The mean readout current and its standard deviation can be calculated for binary and multi-level devices. These values are important for simulating hardware-based artificial neural networks at circuit level and testing their functionality. Research into hardwarebased artificial neural networks is important because they are energy-efficient. Furthermore to calculating the variations, the statistical model can be used to determine what influence the cumulative distribution function of switching has on the variations and which behavior provides the best results for the hardwarebased artificial neural network. Some memristive devices exhibit multi-level behavior due to defects in the switching layer. The number of these defects and the optimal amount can be estimated. KW - RRAM KW - Memristive devices KW - Statistical variations KW - Binary KW - Multi-level KW - Artificial neural networks KW - Cumulative distribution Y1 - 2025 U6 - https://doi.org/10.1109/ESSERC66193.2025.11213973 SP - 373 EP - 376 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Dersch, Nadine A1 - Perez, Eduardo A1 - Wenger, Christian A1 - Schwarz, Mike A1 - Iniguez, Benjamin A1 - Kloes, Alexander T1 - A closed-form model for programming of oxide-based resistive random access memory cells derived from the Stanford model T2 - Solid-state electronics N2 - This paper presents a closed-form model for pulse-based programming of oxide-based resistive random access memory devices. The Stanford model is used as a basis and solved in a closed-form for the programming cycle. A constant temperature is set for this solution. With the closed-form model, the state of the device after programming or the required programming settings for achieving a specific device conductance can be calculated directly and quickly. The Stanford model requires time-consuming iterative calculations for high accuracy in transient analysis, which is not necessary for the closed-form model. The closed-form model is scalable across different programming pulse widths and voltages. KW - RRAM KW - Closed-form KW - Modeling KW - Oxide-based KW - Pulse-programming KW - Resistive random access memory KW - Stanford model KW - Variability Y1 - 2025 U6 - https://doi.org/10.1016/j.sse.2025.109238 SN - 0038-1101 VL - 230 SP - 1 EP - 5 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Wen, Jianan A1 - Baroni, Andrea A1 - Mistroni, Alberto A1 - Perez, Eduardo A1 - Zambelli, Cristian A1 - Wenger, Christian A1 - Krstic, Milos A1 - Bolzani Pöhls, Leticia Maria T1 - ReDiM : an efficient strategy for read disturb mitigation in RRAM-based accelerators T2 - 2025 IEEE 31st International Symposium on On-Line Testing and Robust System Design (IOLTS) N2 - Resistive RAM (RRAM) has emerged as a promising non-volatile memory technology for implementing energy-efficient hardware accelerators within the in-memory computing (IMC) paradigm. However, due to the immature fabrication process and inherent material instabilities, frequent read operations during computations can induce read disturb effects, leading to unintended resistance drift and potential data corruption. Existing mitigation approaches primarily focus on detecting read disturb effects and triggering memory refresh operations. In this work, we propose an architecture-level solution that mitigates read disturb in RRAM-based accelerators. Our strategy employs crossbar duplication and decomposes the single high input pulse into two lower-amplitude pulses, effectively minimizing the risk of read disturb. To validate our approach, we develop a simulation framework that incorporates measurement data from characterized RRAM devices under read disturb stress conditions. Experimental results on VGG-8 with CIFAR-10 demonstrate that the proposed method significantly mitigates inference accuracy degradation caused by read disturb in RRAM-based accelerators, while incurring modest area and energy overheads of 12.32% and 2.15%, respectively. This work provides a practical and scalable solution for enhancing the robustness of RRAM-based accelerators in edge and high-performance computing applications. KW - RRAM KW - Resistive RAM KW - In-memory Computing KW - AI Accelerator KW - Read Disturb KW - Reliability Y1 - 2025 SN - 979-8-3315-3334-2 U6 - https://doi.org/10.1109/IOLTS65288.2025.11117065 SP - 1 EP - 7 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Aftowicz, Marcin A1 - Fritscher, Markus A1 - Lehniger, Kai A1 - Wenger, Christian A1 - Langendörfer, Peter A1 - Brzozowski, Marcin T1 - Hardware-friendly Nyström approximation for water treatment anomaly detection T2 - IECON 2024 - 50th Annual Conference of the IEEE Industrial Electronics Society : proceedings N2 - This paper presents an approach to accelerate One-Class Support Vector Machines (SVM) using a hardware-friendly kernel that doesn't rely on multiplication operations, thus adaptable to hardware platforms. Leveraging Nyström approximation, we implemented a pipeline and compared its performance against a software implementation using libsvm. Furthermore, we evaluated the efficiency of our approach by deploying it on an FPGA. Our experiments, conducted on the SWaT dataset, demonstrate a 50x speedup using the FPGA implementation, achieving a classification time of 21 microseconds per instance. Importantly, we find no degradation in performance, as measured by the f-score of the attack class in the test set. This study explores the potential of hardware acceleration in optimizing anomaly detection systems for real-time applications. KW - OCSVM KW - FPGA KW - Nyström KW - Anomaly Detection KW - SWaT Y1 - 2024 SN - 978-1-6654-6454-3 U6 - https://doi.org/10.1109/IECON55916.2024.10905880 SP - 1 EP - 7 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - Piscataway, NJ ER - TY - GEN A1 - Blumenstein, Alan A1 - Pérez, Eduardo A1 - Wenger, Christian A1 - Dersch, Nadine A1 - Kloes, Alexander A1 - Iñíguez, Benjamín A1 - Schwarz, Mike T1 - Exploring variability and quantization effects in artificial neural networks using the MNIST dataset T2 - Solid-state electronics N2 - This paper investigates the impact of introducing variability to trained neural networks and examines the effects of variability and quantization on network accuracy. The study utilizes the MNIST dataset to evaluate various Multi-Layer Perceptron configurations: a baseline model with a Single-Layer Perceptron and an extended model with multiple hidden nodes. The effects of Cycle-to-Cycle variability on network accuracy are explored by varying parameters such as the standard deviation to simulate dynamic changes in network weights. In particular, the performance differences between the Single-Layer Perceptron and the Multi-Layer Perceptron with hidden layers are analyzed, highlighting the network’s robustness to stochastic perturbations. These results provide insights into the effects of quantization and network architecture on accuracy under varying levels of variability. KW - Single-Layer Perceptron KW - Multi-Layer Perceptron KW - Cycle-to-Cycle variability KW - Quantization KW - Stochastic variability KW - Simulation Y1 - 2026 U6 - https://doi.org/10.1016/j.sse.2025.109296 SN - 0038-1101 VL - 232 SP - 1 EP - 4 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Perez, Eduardo A1 - Maldonado, David A1 - Pechmann, Stefan A1 - Reddy, Keerthi Dorai Swamy A1 - Uhlmann, Max A1 - Hagelauer, Amelie A1 - Roldan, Juan Bautista A1 - Wenger, Christian T1 - Impact of the series resistance on switching characteristics of 1T1R HfO₂-based RRAM devices T2 - 2025 15th Spanish Conference on Electron Devices (CDE) N2 - This study investigates the influence of the series resistance (RS) on the switching characteristics of 1-transistor-1-resistor (1T1R) RRAM devices based on HfO2 and Al:HfO₂ dielectrics. Intrinsic RS values were extracted from I-V characteristics measured over 50 Reset-Set cycles at various gate voltages (VG) by using a numerical transformation method. Results reveal the contribution of the transistor’s resistance to the overall RS. A linear relationship between RS values and Set transition voltages (VTS) was found, with larger RS values amplifying the variability in switching parameters. Comparative analysis of cumulative distribution functions (CDFs) highlights differences between technologies, showing lower VTS values as well as lower sensitivity to RS for Al:HfO₂-based devices. These findings underscore the critical role of RS in modeling and optimizing the performance of RRAM devices for reliable operation. KW - RRAM KW - Memristive device Y1 - 2025 SN - 979-8-3315-9618-7 U6 - https://doi.org/10.1109/CDE66381.2025.11038868 SP - 1 EP - 4 PB - Institute of Electrical and Electronics Engineers (IEEE) CY - Piscataway, NJ ER - TY - GEN A1 - Morales, Carlos A1 - Tschammer, Rudi A1 - Guttmann, Dominic A1 - Chavarin, Carlos Alvarado A1 - Ruffert, Christine A1 - Henkel, Karsten A1 - Wenger, Christian A1 - Flege, Jan Ingo T1 - Bottom-up strategy to develop ultrathin active layers by atomic layer deposition for room temperature hydrogen sensors compatible with CMOS technology T2 - MikroSystemTechnik Kongress 2025 : Mikroelektronik, Mikrosystemtechnik und ihre Anwendungen - Nachhaltigkeit und Technologiesouveränität : proceedings : 27.-29. Oktober 2025, Duisburg Y1 - 2025 SN - 978-3-8007-6614-7 SN - 978-3-8007-6615-4 SP - 71ff. PB - VDE VERLAG GmbH CY - Berlin ER - TY - GEN A1 - Sengül, Akant A1 - Reiter, Sebastian A1 - Lotfi, Zahra A1 - Efremenko, Julia A1 - Laroussi, Arwa A1 - Corley-Wiciak, Agnieszka Anna A1 - Ratzke, Markus A1 - Mirsky, Vladimir M. A1 - Wenger, Christian A1 - Fischer, Inga Anita T1 - Titanium nitride plasmonic nanohole arrays with polymer coating : optical properties and their humidity-induced modifications T2 - Optical materials express N2 - The use of titanium nitride (TiN) for the fabrication of plasmonic structures such as nanohole arrays (NHAs) can enable their integration into optoelectronic devices on the silicon (Si) platform, for example, for the realization of on-chip chemical sensors and biosensors based on refractometric transduction. With a corresponding functionalization of the TiN nanohole arrays, these ultra-compact devices can be utilized in the development of various affinity sensors and sensor systems, such as cost-effective electronic noses for the early detection of gases in the food industry or agriculture. In this work, we focus on two types of coating for functionalization of TiN nanohole arrays: electrochemically synthesized poly-N-methylaniline and layer-by-layer deposited polyacrylic-acid/poly-allylamine (PAA/PAH). Our investigation comprises the experimental characterization of the optical properties of TiN nanhole arrays coated with polymer layers of different thicknesses as well as a comparison with simulation results. We demonstrate the potential of our setup sensing applications by measuring changes in optical properties of TiN nanohole arrays coated with PAA/PAH upon exposure to air of different humidity. Y1 - 2026 U6 - https://doi.org/10.1364/ome.578871 SN - 2159-3930 VL - 16 IS - 2 SP - 184 EP - 196 PB - Optica Publishing Group CY - Washington, DC ER - TY - GEN A1 - Maldonado, D. A1 - Acal, C. A1 - Ortiz, H. A1 - Navas-Gomez, F. A1 - Cantudo, A. A1 - Wenger, Christian A1 - Pérez, Eduardo A1 - Roldán, J.B. T1 - Variability in HfO₂-based memristors under pulse operation T2 - Microelectronic engineering N2 - We have studied device-to-device variability in TiN/Ti/HfO2/TiN devices under pulse operation. We measured extensively memristive devices that are CMOS integrated with different pulse trains, changing the pulse width and amplitude for groups of more than one hundred devices. The statistical parameters of the measured current were extracted to better understand the device physics under the pulse operation regime. An analytical model to describe synaptic depression and potentiation behavior in the device conductance is introduced, it fits accurately the means of the current data for all the pulse trains under study. In addition, an explanation of the measurements is enlightened with kinetic Monte Carlo simulations that allow the study of resistive switching at the atomic level. Finally, the probability distribution functions of the measured currents in some of the pulses within the pulse series employed are analyzed to extract the probability distribution that works better. A proposal for the implementation of device-to-device variability in the Stanford models is introduced. KW - RRAM KW - Resistive switching memory KW - Variability KW - Distribution function KW - Pulse operation KW - Memristive device Y1 - 2026 U6 - https://doi.org/10.1016/j.mee.2026.112445 SN - 0167-9317 VL - 304 SP - 1 EP - 8 PB - Elsevier BV CY - Amsterdam ER - TY - GEN A1 - Schlipf, Jon A1 - Cutolo, Maria Alessandra A1 - Manganelli, Costanza Lucia A1 - Reiter, Sebastian A1 - Seibold, Götz A1 - Skibitzki, Oliver A1 - Wenger, Christian A1 - Fischer, Inga Anita T1 - Fabrication and optical characterization of CMOS-compatible honeycomb-like large-scale lattices of near-field coupled plasmonic TiN nanotriangles T2 - Advanced optical materials N2 - Honeycomb-like plasmonic titanium nitride nanotriangle arrays defined by photolithography and fabricated in a modified silicon-germanium electronic–photonic integrated circuit process in a state-of-the-art pilot line. The nanotriangle arrays are characterized in experiments and simulations. The momentum-dependent reflectance spectra exhibit not only features that are consistent with surface lattice resonances in the honeycomb lattice but also minima governed by near-field coupling of the individual nanotriangles. The optical characterization results in combination with simulation-based predictions indicate that such nanotriangle arrays are capable of supporting collective plasmonic resonances that can be described as massless Dirac particles. The fabrication approach opens up the possibility of integrating the structures into device fabrication processes, and avenues toward near-infrared sensing and communication applications are predicted. KW - Plasmonic Nanostructures KW - Optics of Nanostructures Y1 - 2025 UR - https://advanced.onlinelibrary.wiley.com/doi/epdf/10.1002/adom.202403408 U6 - https://doi.org/10.1002/adom.202403408 SN - 2195-1071 VL - 2025 SP - 1 EP - 8 PB - Wiley-VCH CY - Weinheim ER -