TY - CHAP A1 - Schrape, Oliver A1 - Grass, Eckhard A1 - Petri, Markus A1 - Zeidler, Steffen A1 - Jagdhold, Ulrich A1 - Winkler, Frank T1 - An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis Y1 - 2010 ER - TY - CHAP A1 - Jagdhold, Ulrich T1 - Radiation Hard 0.25 Micron CMOS Library at IHP Y1 - 2008 ER - TY - GEN A1 - Winkler, Frank A1 - Kell, Gerald A1 - Schrape, Oliver A1 - Gustat, Hans A1 - Jagdhold, Ulrich T1 - HDL-Synthese und Simulation von Hochgeschwindigkeits-Digitalschaltungen mit gemischten CMOS- und ECL-Bibliotheken Y1 - 2009 ER - TY - CHAP A1 - Stamenković, Zoran A1 - Panic, Goran A1 - Jagdhold, Ulrich A1 - Frankenfeldt, Horst A1 - Tittelbach-Helmrich, Klaus A1 - Schoof, Gunther A1 - Kraemer, Rolf T1 - Modular Processor: A Flexible Library of ASIC Modules Y1 - 2004 ER - TY - CHAP A1 - Andjelkovic, Marko A1 - Jagdhold, Ulrich A1 - Krstic, Milos A1 - Kraemer, Rolf T1 - 2D TCAD Simulation of Single Event Transients in 250 nm Bulk CMOS Technology T2 - Zuverlässigkeit und Entwurf, 9. ITG/GMM/GI-Fachtagung vom 18.-20. September 2017 in Cottbus Y1 - 2017 SN - 978-3-8007-4444-2 SP - 90 EP - 96 PB - Berlin CY - VDE Verlag ER - TY - CHAP A1 - Maharatna, Koushik A1 - Troya Chinchilla, Alfonso Luis A1 - Krstic, Milos A1 - Grass, Eckhard A1 - Jagdhold, Ulrich T1 - A CORDIC Like Processor for Computation of Arctangent and Absolute Magnitude of a Vector Y1 - 2004 ER - TY - CHAP A1 - Heyer, H.-V. A1 - Jagdhold, Ulrich T1 - Creation of SiGe Radhard Library Y1 - 2006 ER - TY - CHAP A1 - Schoof, Gunther A1 - Kraemer, Rolf A1 - Jagdhold, Ulrich A1 - Wolf, Ch. T1 - Radiation-hardened ASIC Design for Real-time Applications Y1 - 2007 ER - TY - CHAP A1 - Schoof, Gunther A1 - Kraemer, Rolf A1 - Jagdhold, Ulrich A1 - Wolf, Ch. T1 - Fault-Tolerant Design for Applications Exposed to Radiation Y1 - 2007 ER - TY - CHAP A1 - Jagdhold, Ulrich T1 - Creation of a Radiation Hard 0.13 Micron CMOS Library at IHP Y1 - 2010 ER - TY - PAT A1 - Vater, Frank A1 - Jagdhold, Ulrich A1 - Peter, Steffen A1 - Langendörfer, Peter T1 - Taktüberwachungsschaltung Y1 - 2007 ER - TY - PAT A1 - Vater, Frank A1 - Peter, Steffen A1 - Jagdhold, Ulrich A1 - Langendörfer, Peter T1 - Erweiterter Clock Watchdog Y1 - 2007 ER - TY - PAT A1 - Vater, Frank A1 - Peter, Steffen A1 - Jagdhold, Ulrich A1 - Langendörfer, Peter T1 - Verschlüsselungseinheit Y1 - 2006 UR - https://patents.google.com/patent/DE102006062649A1/de ER - TY - JOUR A1 - Krstic, Milos A1 - Maharatna, Koushik A1 - Troya Chinchilla, Alfonso Luis A1 - Grass, Eckhard A1 - Jagdhold, Ulrich T1 - Baseband Processor for IEEE 802.11a Standard with embedded BIST Y1 - 2004 ER - TY - JOUR A1 - Maharatna, Koushik A1 - Grass, Eckhard A1 - Jagdhold, Ulrich T1 - A 64-Point Fourier Transform Chip for High Speed Wireless LAN Application Using OFDM Y1 - 2004 ER - TY - JOUR A1 - Troya Chinchilla, Alfonso Luis A1 - Maharatna, Koushik A1 - Krstic, Milos A1 - Grass, Eckhard A1 - Jagdhold, Ulrich A1 - Kraemer, Rolf T1 - Efficient Inner Receiver Design for OFDM-Based WLAN Systems: Algorithm and Architecture Y1 - 2007 ER - TY - JOUR A1 - Troya Chinchilla, Alfonso Luis A1 - Maharatna, Koushik A1 - Krstic, Milos A1 - Grass, Eckhard A1 - Jagdhold, Ulrich A1 - Kraemer, Rolf T1 - Low-Power VLSI Implementation of the Inner Receiver for OFDM-Based WLAN Systems Y1 - 2008 ER - TY - JOUR A1 - Grass, Eckhard A1 - Tittelbach-Helmrich, Klaus A1 - Jagdhold, Ulrich A1 - Troya Chinchilla, Alfonso Luis A1 - Lippert, Gunther A1 - Krüger, Olaf A1 - Lehmann, Jens A1 - Maharatna, Koushik A1 - Dombrowski, Kai F. A1 - Fiebig, Norbert A1 - Kraemer, Rolf A1 - Mähönen, Petri T1 - On The Single-Chip Implementation of a Hiperlan/2 and IEEE 802.11a Capable Modem Y1 - 2001 ER -