TY - GEN A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - An Object-Oriented Computing Surface for Distributed Memory Architectures T2 - Proceedings of the Twenty-Sixth Hawaii International Conference on System Sciences, Wailea, Hawaii on January 5 - 8, 1993, Vol. 2 Y1 - 1993 SP - 134 EP - 143 PB - IEEE Computer Society Press CY - Los Alamitos, Calif. ER - TY - CHAP A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Modeling Replication and Placement in the PEACE Parallel Operating System - A Case for Dual Objects T2 - Workshop on Dynamic Object Placement and Load Balancing in Parallel and Distributed Systems (ECOOP '92), Utrecht, Netherlands, June 1992 Y1 - 1992 ER - TY - CHAP A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Dual Objects - An Object Model for Distributed System Programming T2 - Proceedings of the 8th ACM SIGOPS European workshop on Support for composing distributed applications Y1 - 1998 SP - 261 EP - 267 PB - ACM Digital Library CY - New York, NY ER - TY - GEN A1 - Cordsen, J. A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Experiences Developing a Virtual Shared Memory System using Hig-Level Object Paradigms T2 - Object oriented programming, 12th European conference, proceedings, ECOOP '98, Brussels, Belgium, July 20 - 24, 1998 Y1 - 1998 SN - 3-540-64737-6 SP - 285 EP - 306 PB - Springer CY - Berlin [u.a.] ER - TY - JOUR A1 - Büttner, L. A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - ARTS of PEACE - A High-Performance Middleware Layer for Parallel and Disributed Computing Y1 - 1999 ER - TY - CHAP A1 - Berg, R. A1 - Cordsen, J. A1 - Heuer, J. A1 - Nolte, Jörg A1 - Oestmann, B. A1 - Sander, M. A1 - Schmidt, Heiko A1 - Schön, F. A1 - Schröder-Preikschat, Wolfgang T1 - The PEACE Family of Distributed Operating Systems Y1 - 1991 ER - TY - CHAP A1 - Berg, R. A1 - Cordsen, J. A1 - Hastedt, Ch. A1 - Heuer, J. A1 - Nolte, Jörg A1 - Sander, M. A1 - Schmidt, Heiko A1 - Schön, F. A1 - Schröder-Preikschat, Wolfgang T1 - Making Massively Parallel Systems Work Y1 - 1991 ER - TY - CHAP A1 - Heuer, J. A1 - Nolte, Jörg A1 - Sander, M. A1 - Schön, F. A1 - Schröder-Preikschat, Wolfgang T1 - Making Massively Parallel Systems Fast Y1 - 1990 ER - TY - GEN A1 - Nürnberger, Stefan A1 - Drescher, Gabor A1 - Rotta, Randolf A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Shared Memory in the Many-Core Age T2 - Euro-Par 2014: Parallel Processing Workshops, Porto, 2014 N2 - With the evolution toward fast networks of many-core processors, the design assumptions at the basis of software-level distributed shared memory (DSM) systems change considerably. But efficient DSMs are needed because they can significantly simplify the implementation of complex distributed algorithms. This paper discusses implications of the many-core evolution and derives a set of reusable elementary operations for future software DSMs. These elementary operations will help in exploring and evaluating new memory models and consistency protocols. Y1 - 2014 UR - http://link.springer.com/chapter/10.1007%2F978-3-319-14313-2_30 SN - 978-3-319-14312-5 U6 - https://doi.org/10.1007/978-3-319-14313-2_30 SP - 351 EP - 362 PB - Springer International Publishing CY - Cham ER - TY - GEN A1 - Duda, Niklas A1 - Nowak, Thorsten A1 - Hartmann, Markus A1 - Schadhauser, Michael A1 - Cassens, Björn A1 - Wägemann, Peter A1 - Nabeel, Muhammad A1 - Ripperger, Simon A1 - Herbst, Sebastian A1 - Meyer-Wegener, Klaus A1 - Mayer, Frieder A1 - Dressler, Falko A1 - Schröder-Preikschat, Wolfgang A1 - Kapitza, Rüdiger A1 - Robert, Jörg A1 - Thielecke, Jörn A1 - Weigel, Robert A1 - Kölpin, Alexander T1 - BATS: Adaptive Ultra Low Power Sensor Network for Animal Tracking T2 - Sensors Y1 - 2018 U6 - https://doi.org/10.3390/s18103343 SN - 1424-8220 VL - 18 IS - 10 ER - TY - GEN A1 - Eichler, Christian A1 - Hofmeier, Henriette A1 - Reif, Stefan A1 - Hönig, Timo A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Neverlast: Towards the Design und Implementation of the NVM-based Everlasting Operating System T2 - Hawaii International Conference on System Sciences 2021 - HICSS-54 KW - operating systems KW - non-volatile memory KW - software development for mobile devices, the internet-of-things, and cyber physical systems energy Y1 - 2021 UR - https://scholarspace.manoa.hawaii.edu/handle/10125/71491 U6 - https://doi.org/10.24251/HICSS.2021.870 SP - 7227 EP - 7236 PB - Scholarspace ER - TY - GEN A1 - Köhler, Sven A1 - Herzog, Benedict A1 - Hönig, Timo A1 - Wenzel, Lukas A1 - Plauth, Max A1 - Nolte, Jörg A1 - Polze, Andreas A1 - Schröder-Preikschat, Wolfgang T1 - Pinpoint the Joules: Unifying Runtime-Support for Energy Measurements on Heterogeneous Systems T2 - 2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS) N2 - For the design and operation of today's computer systems, power and energy requirements are highest priorities. Unlike performance analyses, however, power and energy measurements of heterogeneous systems are difficult to conduct. Especially at the system-software level, performing power and energy measurements remains challenging. Yet, such measurements are essential to improve software components for low power and high energy-efficiency.In this paper, we analyze and discuss the power and energy characteristics of several heterogeneous systems with up to 20 cores (160 hardware threads) and 1 TB of main memory. For the analyzed systems, we outline challenges regarding power and energy measurements and show ways to overcome limitations (i.e., sampling constraints). To improve the current state of the art in power and energy measurements at the system-software level, we present the design and implementation of PINPOINT, an energy-profiling tool which unifies different power and energy measurement interfaces. Y1 - 2020 UR - https://www.computer.org/csdl/proceedings-article/ross/2020/104600a031/1pXlZMpoXTO VL - 1 SP - 31 EP - 40 PB - IEEE Xplore ER - TY - GEN A1 - Schmaus, Florian A1 - Pfeiffer, Nicolas A1 - Hönig, Timo A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Nowa: A Wait-Free Continuation-Stealing Concurrency Platform T2 - 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS) Y1 - 2021 SN - 978-1-6654-4066-0 U6 - https://doi.org/10.1109/IPDPS49936.2021.00044 SP - 360 EP - 371 PB - IEEE ER - TY - GEN A1 - Rabenstein, Jonas A1 - Nguyen, Dustin A1 - Giersch, Oliver A1 - Eichler, Christian A1 - Hönig, Timo A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang ED - Goumas, Georgios ED - Tomforde, Sven ED - Brehm, Jürgen ED - Wildermann, Stefan ED - Pionteck, Thilo T1 - Back to the core-memory age: running operating systems in NVRAM only T2 - Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023 N2 - The classic core memory was completely non-volatile and thus kept at least part of the operating system persistently in main memory, even over power cycles. Nowadays we can repeat this approach with NVRAM, but with terabytes of main memory on a completely different scale and with parts of the operating-system state stored in volatile CPU caches. In this paper, we discuss our experiences of running large modern operating systems including their applications entirely in NVRAM. We adapted stock Linux and FreeBSD kernels to work exclusively with NVRAM by hiding all DRAM from the kernels at boot time to establish a realistic performance baseline without changing anything else. Following this entirely NVRAM-agnostic approach, we could observe an effective performance penalty of a factor of about four, but only negligible increases in whole-system power draw. For our system with two CPU sockets and 56 cores total, we also observed a reduction in power draw in several scenarios. Due to prolonged execution times, the energy consumption increased as well for these measured workloads. While this might be discouraging at first sight, this result was achieved without any performance tuning as to the specific characteristics of today’s NVRAM technology. Therefore, we are also discussing means to mitigate the observed shortcomings by integrating NVRAM appropriately into the memory hierarchy of future robust persistent systems. KW - NVRAM KW - Operating Systems KW - Energy Y1 - 2023 SN - 978-3-031-42784-8 U6 - https://doi.org/10.1007/978-3-031-42785-5_11 SP - 153 EP - 167 PB - Springer-Verlag ER - TY - GEN A1 - Giersch, Oliver A1 - Nguyen, Dustin A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Virtual memory revisited for tiered memory T2 - Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems N2 - The landscape of memory technologies has grown substantially more diverse and heterogeneous, with a number of special-purpose memory technologies reaching market maturity in recent years, such as NVRAM (Non-Volatile Memory), HBM (High-Bandwidth Memory) or the upcoming CXL.mem. Future computing systems will have to contend with byte-addressable and cache-coherent main memory that is highly diverse, either in terms of the fundamental performance characteristics of its underlying memory technology, or due to the fact that CXL.mem will allow accessing homogenous but remote memory. The VM (Virtual Memory) subsystems of today have been empirically optimized over decades, but were designed for a single tier of main memory only. While recent approaches that integrated tiered memory have focused on better memory access metrics to improve page placement strategies, we seek to leverage the proven heuristics that are already in place. In times of high load we assign pages from slower memory, demote inactive pages according to standard page replacement strategies and use lazy page promotions when sufficient resources are available again to retain the inherently high reactivity of demand paging with regard to working set changes. We integrate these mechanisms into the VM subsystem of a full-featured mainstream operating system (FreeBSD) with minimal adaptations. The resulting multi-tier VM system runs in a stable and efficient manner under high stress even with highly unfavorable work loads. KW - Operating Systems KW - Resource Disaggregation Y1 - 2024 SN - 979-8-4007-1105-3 U6 - https://doi.org/10.1145/3678015.3680475 SP - 1 EP - 7 PB - ACM CY - New York, NY, USA ER -