TY - GEN A1 - Exenberger Becker, Pedro H. A1 - Sartor, Anderson L. A1 - Brandalero, Marcelo A1 - Jost, Tiago Trevisan A1 - Wong, Stephan A1 - Carro, Luigi A1 - Beck, Antonio Carlos Schneider T1 - A Low-Cost BRAM-Based Function Reuse for Configurable Soft-Core Processors in FPGAs T2 - Applied Reconfigurable Computing. Architectures, Tools, and Applications 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings Y1 - 2018 SN - 978-3-319-78889-0 SN - 978-3-319-78890-6 U6 - https://doi.org/10.1007/978-3-319-78890-6_40 SN - 0302-9743 SN - 1611-3349 SP - 499 EP - 510 PB - Springer CY - Cham ER - TY - GEN A1 - Exenberger Becker, Pedro H. A1 - Sartor, Anderson L. A1 - Brandalero, Marcelo A1 - Beck, Antonio Carlos Schneider T1 - BRAM-based function reuse for multi-core architectures in FPGAs T2 - Microprocessors and Microsystems Y1 - 2019 U6 - https://doi.org/10.1016/j.micpro.2018.09.007 SN - 0141-9331 VL - 63 SP - 237 EP - 248 ER -