TY - GEN A1 - Rabenstein, Jonas A1 - Nguyen, Dustin A1 - Giersch, Oliver A1 - Eichler, Christian A1 - Hönig, Timo A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang ED - Goumas, Georgios ED - Tomforde, Sven ED - Brehm, Jürgen ED - Wildermann, Stefan ED - Pionteck, Thilo T1 - Back to the core-memory age: running operating systems in NVRAM only T2 - Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023 N2 - The classic core memory was completely non-volatile and thus kept at least part of the operating system persistently in main memory, even over power cycles. Nowadays we can repeat this approach with NVRAM, but with terabytes of main memory on a completely different scale and with parts of the operating-system state stored in volatile CPU caches. In this paper, we discuss our experiences of running large modern operating systems including their applications entirely in NVRAM. We adapted stock Linux and FreeBSD kernels to work exclusively with NVRAM by hiding all DRAM from the kernels at boot time to establish a realistic performance baseline without changing anything else. Following this entirely NVRAM-agnostic approach, we could observe an effective performance penalty of a factor of about four, but only negligible increases in whole-system power draw. For our system with two CPU sockets and 56 cores total, we also observed a reduction in power draw in several scenarios. Due to prolonged execution times, the energy consumption increased as well for these measured workloads. While this might be discouraging at first sight, this result was achieved without any performance tuning as to the specific characteristics of today’s NVRAM technology. Therefore, we are also discussing means to mitigate the observed shortcomings by integrating NVRAM appropriately into the memory hierarchy of future robust persistent systems. KW - NVRAM KW - Operating Systems KW - Energy Y1 - 2023 SN - 978-3-031-42784-8 U6 - https://doi.org/10.1007/978-3-031-42785-5_11 SP - 153 EP - 167 PB - Springer-Verlag ER - TY - GEN A1 - Giersch, Oliver A1 - Nguyen, Dustin A1 - Nolte, Jörg A1 - Schröder-Preikschat, Wolfgang T1 - Virtual memory revisited for tiered memory T2 - Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems N2 - The landscape of memory technologies has grown substantially more diverse and heterogeneous, with a number of special-purpose memory technologies reaching market maturity in recent years, such as NVRAM (Non-Volatile Memory), HBM (High-Bandwidth Memory) or the upcoming CXL.mem. Future computing systems will have to contend with byte-addressable and cache-coherent main memory that is highly diverse, either in terms of the fundamental performance characteristics of its underlying memory technology, or due to the fact that CXL.mem will allow accessing homogenous but remote memory. The VM (Virtual Memory) subsystems of today have been empirically optimized over decades, but were designed for a single tier of main memory only. While recent approaches that integrated tiered memory have focused on better memory access metrics to improve page placement strategies, we seek to leverage the proven heuristics that are already in place. In times of high load we assign pages from slower memory, demote inactive pages according to standard page replacement strategies and use lazy page promotions when sufficient resources are available again to retain the inherently high reactivity of demand paging with regard to working set changes. We integrate these mechanisms into the VM subsystem of a full-featured mainstream operating system (FreeBSD) with minimal adaptations. The resulting multi-tier VM system runs in a stable and efficient manner under high stress even with highly unfavorable work loads. KW - Operating Systems KW - Resource Disaggregation Y1 - 2024 SN - 979-8-4007-1105-3 U6 - https://doi.org/10.1145/3678015.3680475 SP - 1 EP - 7 PB - ACM CY - New York, NY, USA ER -