TY - GEN A1 - Nannipieri, Pietro A1 - Giuffrida, Gianluca A1 - Lorenzo, Diana A1 - Panicacci, Silvia A1 - Zulberti, Luca A1 - Fanucci, Luca A1 - Munoz-Hernandez, Hector Gerardo A1 - Hübner, Michael T1 - ICU4SAT: A General-Purpose Reconfigurable Instrument Control Unit Based on Open Source Components T2 - IEEE Aerospace Conference (AERO), 5-12 March 2022 Y1 - 2022 SN - 978-16654-3760-8 U6 - https://doi.org/10.1109/AERO53065.2022.9843414 SP - 1 EP - 9 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Brandalero, Marcelo A1 - Veleski, Mitko A1 - Muñoz-Hernandez, Hector Gerardo A1 - Ali, Muhammad A1 - Le Jeune, Laurens A1 - Goedemé, Toon A1 - Mentens, Nele A1 - Vandendriessche, Jurgen A1 - Lhoest, Lancelot A1 - Da Silva, Bruno A. A1 - Touhafi, Abdellah A1 - Goehringer, Diana A1 - Hübner, Michael T1 - Embedded AI Techniques for Industrial Applications T2 - 31st International Conference on Field-Programmable Logic and Applications (FPL), Dresden, Germany, 30 August-3 September 2021 Y1 - 2021 SN - 978-1-6654-3759-2 U6 - https://doi.org/10.1109/FPL53798.2021.00071 SP - 374 EP - 375 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Gonçalves, Marcio M. A1 - Benevenuti, Fabio A1 - Munoz-Hernandez, Hector Gerardo A1 - Brandalero, Marcelo A1 - Hübner, Michael A1 - Kastensmidt, Fernanda A1 - Azambuja, Jose Rodrigo T1 - Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults T2 - 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), virtual conference, November 23-25, 2020 Y1 - 2020 SN - 978-1-7281-6044-3 SN - 978-1-7281-6045-0 U6 - https://doi.org/10.1109/ICECS49266.2020.9294939 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Brandalero, Marcelo A1 - Ali, Muhammad A1 - Le Jeune, Laurens A1 - Munoz-Hernandez, Hector Gerardo A1 - Veleski, Mitko A1 - Silva, Bruno da A1 - Lemeire, Jan A1 - Van Beeck, Kristof A1 - Touhafi, Abdellah A1 - Goedemé, Toon A1 - Mentens, Nele A1 - Göhringer, Diana A1 - Hübner, Michael T1 - AITIA: Embedded AI Techniques for Industrial Applications T2 - International Conference on Omni-Layer Intelligent Systems (COINS), 31 August-2 September 2020, Barcelona, Spain Y1 - 2020 SN - 978-1-7281-6371-0 U6 - https://doi.org/10.1109/COINS49042.2020.9191672 SP - 1 EP - 7 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Schwenger, Lars A1 - Holzinger, Philipp A1 - Fey, Dietmar A1 - Munoz-Hernandez, Hector Gerardo A1 - Reichenbach, Marc ED - Orailoglu, Alex ED - Reichenbach, Marc ED - Jung, Matthias T1 - EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis T2 - Embedded computer systems : architectures, modeling, and simulation : 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, proceedings Y1 - 2022 SN - 978-3-031-15073-9 SN - 978-3-031-15074-6 SP - 43 EP - 60 PB - Springer CY - Cham ER - TY - GEN A1 - Knödtel, Johannes A1 - Munoz-Hernandez, Hector Gerardo A1 - Lehnert, Alexander A1 - Thieu, Gia Bao A1 - Gesper, Sven A1 - Payá-Vayá, Guillermo A1 - Reichenbach, Marc ED - Palumbo, Francesca ED - Keramidas, Georgios ED - Voros, Nikolaos ED - Diniz, Pedro C. T1 - TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs T2 - Applied Reconfigurable Computing. Architectures, Tools, and Applications, 19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings Y1 - 2023 SN - 978-3-031-42920-0 SN - 978-3-031-42921-7 U6 - https://doi.org/10.1007/978-3-031-42921-7_21 SP - 307 EP - 321 PB - Springer CY - Cham ER - TY - GEN A1 - Muñoz-Hernandez, Hector Gerardo A1 - Ali, Muhammad A1 - Shahin, Keyvan A1 - Siyavashi, Alireza A1 - Göhringer, Diana A1 - Reichenbach, Marc A1 - Herglotz, Christian A1 - Hübner, Michael T1 - Towards complete open-source environments : FPGA-based GPU overlay controlled by RISC-V T2 - Architecture of computing systems : 38th International Conference, ARCS 2025 Kiel, Germany, April 22–24, 2025, proceedings N2 - Image and signal processing applications have been widely implemented in Field Programmable Gate Arrays (FPGAs) and Graphical Processing Units (GPUs) due to their energy efficiency and performance, respectively. GPUs provide high data processing parallelism and are usually chosen to accelerate applications where low energy consumption is not a high priority. On the other hand, FPGAs are more tailored to hardware solutions due to their reconfigurability, but they struggle to outperform GPUs in data throughput. Soft IP cores implemented on reconfigurable hardware, are an alternative offering advantages from both worlds. Some of these soft-core solutions offer an entire environment that includes scripts to automate their implementation, custom compilers, and other diverse tools. Unfortunately, some of these soft-cores are dependent on proprietary Intellectual Property (IP) or require hardware expertise to use properly. In this work, we propose an extended version of a popular open-source soft GPU, which can now run alongside a soft RISC-V core, and with High-Bandwidth memory (HBM2) compatibility. Previously, this soft GPU was only ready to be deployed in boards with a hard ARM core, but now it can be easily used in FPGAs without this requirement. We also provide an evaluation of how the soft GPU performs with respect to the pure RISC-V core, and a hard ARM core achieving geometric mean speed-ups of 114.60x and 19.72x respectively when performing some image and signal processing applications. Finally, we demonstrate how our soft GPU benefits from the HBM integration. KW - FPGA KW - Soft-core GPU KW - System-On-Chip KW - RISC-V KW - HBM Y1 - 2025 SN - 978-3-032-03280-5 U6 - https://doi.org/https://doi.org/10.1007/978-3-032-03281-2_7 SN - 0302-9743 SP - 94 EP - 108 PB - Springer CY - Berlin ER -