TY - CHAP A1 - Krstic, Milos A1 - Fan, Xin A1 - Babic, Milan A1 - Grass, Eckhard A1 - Bjerregaard, T. A1 - Yakovlev, A. T1 - Reducing Switching Noise Effects by Advanced Clock Management T2 - 11th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 4-8 July, St. Petersburg, Russia 2017 Y1 - 2017 SN - 978-1-5386-2689-4 SP - 3 EP - 8 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Andjelkovic, Marko A1 - Krstic, Milos A1 - Kraemer, Rolf A1 - Veeravalli, Varadan Savulimedu A1 - Steininger, Andreas T1 - Erstellung eines Modells der kritischen Ladung zur Bewertung der Robustheit gegenüber SETs und SEUs: Fallstudie Muller C-Element T2 - Zuverlässigkeit und Entwurf, 9. ITG/GMM/GI-Fachtagung vom 18.-20. September 2017 in Cottbus Y1 - 2017 SN - 978-3-8007-4444-2 SP - 17 EP - 24 PB - Berlin CY - VDE Verlag ER - TY - CHAP A1 - Troya Chinchilla, Alfonso Luis A1 - Maharatna, Koushik A1 - Krstic, Milos A1 - Grass, Eckhard A1 - Kraemer, Rolf T1 - OFDM Synchronizer Implementation for an IEEE 802.11a Compliant Modem Y1 - 2002 ER - TY - CHAP A1 - Andjelkovic, Marko A1 - Jagdhold, Ulrich A1 - Krstic, Milos A1 - Kraemer, Rolf T1 - 2D TCAD Simulation of Single Event Transients in 250 nm Bulk CMOS Technology T2 - Zuverlässigkeit und Entwurf, 9. ITG/GMM/GI-Fachtagung vom 18.-20. September 2017 in Cottbus Y1 - 2017 SN - 978-3-8007-4444-2 SP - 90 EP - 96 PB - Berlin CY - VDE Verlag ER - TY - CHAP A1 - Maharatna, Koushik A1 - Troya Chinchilla, Alfonso Luis A1 - Krstic, Milos A1 - Grass, Eckhard A1 - Jagdhold, Ulrich T1 - A CORDIC Like Processor for Computation of Arctangent and Absolute Magnitude of a Vector Y1 - 2004 ER - TY - GEN A1 - Perez-Bosch Quesada, Emilio A1 - Mahadevaiah, Mamathamba Kalishettyhalli A1 - Rizzi, Tommaso A1 - Wen, Jianan A1 - Ulbricht, Markus A1 - Krstic, Milos A1 - Wenger, Christian A1 - Perez, Eduardo T1 - Experimental Assessment of Multilevel RRAM-based Vector-Matrix Multiplication Operations for In-Memory Computing T2 - IEEE Transactions on Electron Devices N2 - Resistive random access memory (RRAM)-based hardware accelerators are playing an important role in the implementation of in-memory computing (IMC) systems for artificial intelligence applications. The latter heavily rely on vector-matrix multiplication (VMM) operations that can be efficiently boosted by RRAM devices. However, the stochastic nature of the RRAM technology is still challenging real hardware implementations. To study the accuracy degradation of consecutive VMM operations, in this work we programed two RRAM subarrays composed of 8x8 one-transistor-one-resistor (1T1R) cells following two different distributions of conductive levels. We analyze their robustness against 1000 identical consecutive VMM operations and monitor the inherent devices’ nonidealities along the test. We finally quantize the accuracy loss of the operations in the digital domain and consider the trade-offs between linearly distributing the resistive states of the RRAM cells and their robustness against nonidealities for future implementation of IMC hardware systems. KW - RRAM KW - Vector Matrix Multiplication KW - variability Y1 - 2023 U6 - https://doi.org/10.1109/TED.2023.3244509 SN - 0018-9383 VL - 70 IS - 4 SP - 2009 EP - 2014 ER - TY - CHAP A1 - Simevski, Aleksandar A1 - Kraemer, Rolf A1 - Krstic, Milos T1 - Low-Complexity Integrated Circuit Aging Monitor Y1 - 2011 ER - TY - CHAP A1 - Schrape, Oliver A1 - Krstic, Milos A1 - Philipp, Gunnar A1 - Winkler, Frank T1 - A Digital Design Flow for Differential ECL High Speed Applications Y1 - 2011 ER - TY - CHAP A1 - Krstic, Milos A1 - Fan, X. A1 - Grass, Eckhard A1 - Strano, A. A1 - Bertozzi, Davide A1 - Heer, Ch. A1 - Sanders, B. A1 - Benini, L. A1 - Kakooe, M. R. T1 - Moonrake Chip - GALS Demonstrator in 40 nm CMOS Technology Y1 - 2011 ER - TY - CHAP A1 - Fan, X. A1 - Krstic, Milos A1 - Wolf, Ch. A1 - Grass, Eckhard T1 - GALS Design for On-Chip Ground Bounce Suppression Y1 - 2011 ER - TY - CHAP A1 - Grass, Eckhard A1 - Winkler, F. A1 - Krstic, Milos A1 - Julius, A. A1 - Stahl, C. A1 - Piz, M. T1 - Enhanced GALS Techniques for Datapath Applications Y1 - 2005 ER - TY - CHAP A1 - Maharatna, Koushik A1 - Troya Chinchilla, Alfonso Luis A1 - Krstic, Milos A1 - Grass, Eckhard T1 - On the Implementation of a Low-Power IEEE 802.11a Compliant Viterbi Decoder Y1 - 2006 ER - TY - CHAP A1 - Grass, Eckhard A1 - Herzel, F. A1 - Piz, M. A1 - Schmalz, K. A1 - Sun, Yaoming A1 - Glisic, S. A1 - Krstic, Milos A1 - Tittelbach-Helmrich, Klaus A1 - Ehrig, Marcus A1 - Winkler, W. A1 - Scheytt, J. Christoph A1 - Kraemer, Rolf T1 - 60 GHz SiGe-BiCMOS Radio for OFDM Transmission Y1 - 2007 ER - TY - CHAP A1 - Piz, M. A1 - Krstic, Milos A1 - Ehrig, Marcus A1 - Grass, Eckhard T1 - An OFDM Baseband Receiver for Short-Range Communication at 60 GHz Y1 - 2009 ER - TY - GEN A1 - Andjelkovic, Marko A1 - Chen, Junchao A1 - Simevski, Aleksandar A1 - Stamenkovic, Zoran A1 - Krstic, Milos A1 - Kraemer, Rolf T1 - A Review of Particle Detectors for Space-Borne Self-Adaptive Fault Tolerant Systems T2 - 18th IEEE East-West Design and Test Symposium (EWDTS 2020), Varna, Bulgaria, 04 - 07 September 2020 Y1 - 2020 SN - 978-1-7281-9899-6 SN - 978-1-7281-9898-9 SN - 978-1-7281-9900-9 U6 - https://doi.org/10.1109/EWDTS50664.2020.9225138 SN - 2472-761X PB - IEEE ER - TY - PAT A1 - Grass, Eckhard A1 - Krstic, Milos A1 - Winkler, F. T1 - GALS-Schaltung und Verfahren zum Betrieb einer GALS-Schaltung Y1 - 2005 ER - TY - GEN A1 - Andjelkovic, Marko A1 - Li, Yuanqing A1 - Stamenković, Zoran A1 - Krstic, Milos A1 - Kraemer, Rolf T1 - Characterization and Modeling of SET Generation Effects in CMOS Standard Logic Cells T2 - 25th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2019), Rhodos, Greece, 01 - 03 July 2019 Y1 - 2019 SN - 978-1-7281-2490-2 SN - 978-1-7281-2489-6 SN - 978-1-7281-2491-9 U6 - https://doi.org/10.1109/IOLTS.2019.8854379 SN - 1942-9401 PB - IEEE ER - TY - GEN A1 - Veleski, Mitko A1 - Kraemer, Rolf A1 - Krstic, Milos T1 - SWIELD: An In Situ Approach for Adaptive Low Power and Error-Resilient Operation T2 - 17th IEEE East-West Design & Test Symposium (EWDTS 2019), Batumi, Georgia, 13 - 16 September 2019 Y1 - 2019 SN - 978-1-7281-1003-5 SN - 978-1-7281-1002-8 SN - 978-1-7281-1004-2 U6 - https://doi.org/10.1109/EWDTS.2019.8884428 SN - 2472-761X PB - IEEE ER - TY - CHAP A1 - Andjelkovic, Marko A1 - Krstic, Milos A1 - Kraemer, Rolf A1 - Veeravalli, Varadan Savulimedu A1 - Steininger, Andreas T1 - A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study T2 - IEEE 26th Asian Test Symposium (ATS), Taipei, Taiwan, 28-30 November 2017 Y1 - 2017 SN - 978-1-5386-2437-1 U6 - https://doi.org/10.1109/ATS.2017.27 SP - 78 EP - 83 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Veleski, Mitko A1 - Hübner, Michael A1 - Krstic, Milos A1 - Kraemer, Rolf T1 - Design and implementation strategy of adaptive processor-based systems for error resilient and power-efficient operation T2 - 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS, April 7-9 2021 Y1 - 2021 SN - 978-1-6654-3595-6 U6 - https://doi.org/10.1109/DDECS52668.2021.9417023 SP - 57 EP - 62 PB - IEEE CY - Piscataway, NJ ER -