TY - CHAP A1 - Schölzel, Mario A1 - Koal, Tobias A1 - Vierhaus, Heinrich Theodor T1 - Reconfigurable High Performance Architectures T2 - 19th IEEE European Test Symposium (ETS), 26 May - 30 May 2014, Paderborn Y1 - 2014 SN - 978-1-4799-3415-7 PB - IEEE ER - TY - CHAP A1 - Urban, Roberto A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor T1 - Entwicklungsumgebung für den compilerzentrierten Mikroprozessorentwurf (CoMet) T2 - DASS 2014, Dresdner Arbeitstagung Schaltungs- und Systementwurf, Tagungsband Y1 - 2014 SN - 978-3-8396-0738-1 PB - Fraunhofer Verlag CY - Stuttgart ER - TY - CHAP A1 - Schölzel, Mario A1 - Koal, Tobias A1 - Vierhaus, Heinrich Theodor T1 - Diagnostics self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults T2 - International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2014), Amsterdam, Netherlands, 1 - 3 October 2014 Y1 - 2014 SN - 978-1-4799-6155-9 SN - 978-1-4799-6156-6 SP - 27 EP - 32 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Urban, Roberto A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor A1 - Altmann, Enrico A1 - Seelig, Horst T1 - Compiler-Centred Microprocessors Design (CoMet) - From C-Code to a VHDL Model of an ASIP T2 - 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, 22-24 April 2015, Belgrade, Serbia, proceedings Y1 - 2015 SN - 978-1-4799-6779-7 SN - 978-1-4799-6780-3 SP - 17 EP - 22 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Scharoba, Stefan A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor T1 - On reliability Estimation for Combined Transient and Permanent Fault Handling T2 - 14th Biennial Baltic Electronic Conference (BEC), Tallinn, Estonia, 6-8 October 2014 Y1 - 2014 SN - 978-1-4673-9539-7 SN - 978-1-4673-9540-3 SP - 73 EP - 76 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Müller, Sebastian A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor T1 - Towards a Graceful Degradable Multicore-System by hierarchical Handling of Hard Errors T2 - DaRMuS 2013, Special Session on Dynamic and Reliable Multicore Systems, Hosted by 21st Euromicro PDP Conference Y1 - 2013 SN - 978-146-735-321-2 SP - 302 EP - 309 PB - IEEE CY - Piscataway ER - TY - CHAP A1 - Urban, Roberto A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor ED - Dietrich, Manfred T1 - Compilerzentrierter Mikroprozessor T2 - Tagungsband Dredner Arbeitstagung für Schaltungs- und Systementwurf (DASS 2013) Y1 - 2013 SN - 978-3-8396-0545-5 PB - Fraunhofer-Verl. CY - Stuttgart ER - TY - CHAP A1 - Urban, Roberto A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor T1 - Ein konfigurierbarer Zwischencodesimulator zum compilerzentrierten Mikroprozessorentwurf T2 - Tagungsband Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2013) Y1 - 2013 PB - Univ., ITMZ CY - Rostock ER - TY - CHAP A1 - Müller, Sebastian A1 - Schölzel, Mario A1 - Vierhaus, Heinrich Theodor T1 - Hierarchical Self-repair in Heterogenous Multi-core Systems by Means of a Software-based Reconfiguration T2 - VEFRE 8th Workshop on Dependability and Fault-Tolerance, Proceedings of ARCS 2012 Workshops Y1 - 2012 SN - 978-1-4673-1913-3 PB - IEEE CY - Piscataway ER - TY - CHAP A1 - Schölzel, Mario A1 - Koal, Tobias A1 - Röder, Stephanie A1 - Vierhaus, Heinrich Theodor T1 - Towards an Automatic Generation of Diagnostic In-Field SBST for Processor Components T2 - Proceedings, 14th IEEE Latin American Test Workshop (LATW 2013) Y1 - 2013 PB - IEEE CY - Piscataway ER - TY - CHAP A1 - Schölzel, Mario A1 - Koal, Tobias A1 - Vierhaus, Heinrich Theodor ED - Raik, Jaan T1 - An Adaptive Self-Test Routine for In-Field Diagnosis of Permanent Faults in Simple RISC Cores T2 - Proceedings, 15th IEEE Interantional Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Tallinn, April 2012 Y1 - 2012 SN - 978-1-4673-1185-4 SP - 312 EP - 317 PB - IEEE CY - Piscataway ER - TY - CHAP A1 - Schölzel, Mario A1 - Koal, Tobias A1 - Vierhaus, Heinrich Theodor T1 - Adaptiver softwarebasierter Selbsttest einfacher RISC-Prozessoren zur Lokalisierung von permanenten Fehlern im Feld T2 - Dresdner Arbeitstagung für Schaltungs- und Systementwurf (DASS), Dresden, Mai 2012, Tagungsband Y1 - 2012 SN - 978-3-8396-0404-5 SP - 150 EP - 155 PB - Fraunhofer IIS, Institutsteil EAS [u.a.] CY - Dresden ER - TY - GEN A1 - Lehniger, Kai A1 - Aftowicz, Marcin A1 - Schölzel, Mario A1 - Langendörfer, Peter T1 - Coarse-Grained Control Flow Integrity Check for Processors with Sliding Register Windows T2 - 12th Mediterranean Conference on Embedded Computing (MECO) Y1 - 2023 SN - 979-8-3503-2291-0 SN - 979-8-3503-2290-3 U6 - https://doi.org/10.1109/MECO58584.2023.10154928 SN - 2637-9511 ER - TY - GEN A1 - Lehniger, Kai A1 - Schölzel, Mario A1 - Tabatt, Peter A1 - Aftowicz, Marcin A1 - Langendörfer, Peter T1 - Simplified Control Flow Integrity Method for Permutated Programs T2 - Proc. 32. Crypto-Day Matters 2021, (2021) Y1 - 2021 U6 - https://doi.org/10.18420/cdm-2021-32-21 ER - TY - THES A1 - Schölzel, Mario T1 - Automatisierter Entwurf anwendungsspezifischer VLIW-Prozessoren KW - Entwurfsautomation KW - Hardwareentwurf KW - VLIW-Architektur KW - Design-Space-Exploration KW - VLIW KW - Prozessorentwurf Y1 - 2006 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:kobv:co1-opus-397 UR - http://opus.kobv.de/btu/volltexte/2006/39/ ER -