TY - CHAP A1 - Kothe, René A1 - Vierhaus, Heinrich Theodor T1 - Fault Diagnosis in Logic Circuits Exploiting Regularity T2 - Tagungsband, edaWorkshop 08, Hannover, 6. - 7. Mai 2008 Y1 - 2008 SN - 978-3-8007-3101-5 SP - 57 EP - 62 PB - VDE-Verl. CY - Berlin [u.a.] ER - TY - CHAP A1 - Koal, Tobias A1 - Kothe, René A1 - Vierhaus, Heinrich Theodor T1 - SoC Self Test Based on a Test Processor T2 - Design an Test Technology for Dependable Systems on Chip Y1 - 2011 SN - 978-1-6096-0212-3 SP - 360 EP - 375 PB - IGI Global CY - Hershey [u.a.] ER -