TY - GEN A1 - Killat, Dirk A1 - Ulmann, Bernd A1 - Köppel, Sven T1 - Hybrid integrators with predictive overload estimation for analog computers and continuous-time ΔΣ modulators T2 - Advances in Radio Science Y1 - 2023 U6 - https://doi.org/10.5194/ars-21-89-2023 SN - 1684-9973 VL - 21 SP - 89 EP - 100 ER - TY - GEN A1 - Killat, Dirk A1 - Köppel, Sven A1 - Ulmann, Bernd A1 - Wetzel, Lucas T1 - Solving Partial Differential Equations with Monte Carlo / Random Walk on an Analog-Digital Hybrid Computer T2 - Tagungsband MikroSystemTechnik Kongress 2023, Dresden, 23. - 25. Oktober 2023 Y1 - 2023 SN - 978-3-8007-6203-3 SN - 978-3-8007-6204-0 SP - 556 EP - 564 PB - VDE Verlag CY - Berlin ER - TY - GEN A1 - Vijayakumar, Shreyas Subramanya A1 - Pitonak, Pavol A1 - Killat, Dirk T1 - A Function Generator on TSMC 65nm CMOS for Analog Computing T2 - 2024 Kleinheubach Conference, September 24-26, 2024, Miltenberg, Germany N2 - This paper presents a detailed analysis of a function generator that utilizes a fully differential analog input processed through a current subtractor, offset comparators, thermometercoded current steering X-iDAC, programmable ROM, 11-to-32 decoder and Y-iDAC. This configuration enables precise and customizable waveform generation, crucial for various applications in analog computing and signal processing. KW - Signal generators;Decoding;Read only memory;Function generator;current subtractor;offset comparators;X-iDAC;programmable ROM;11-to-32 decoder;Y-iDAC Y1 - 2024 UR - https://ieeexplore.ieee.org/document/10739166 U6 - https://doi.org/10.23919/IEEECONF64570.2024.10739166 PB - IEEE ER - TY - GEN A1 - Venkatesha, Shishira S A1 - Killat, Dirk T1 - Design of a fully differential track-and-hold amplifier T2 - 2025 Kleinheubach Conference N2 - This paper presents a fully differential track-and-hold amplifier (THA) architecture for high-speed applications. The proposed design employs a distinctive switching arrangement that converts non-linear errors into a constant offset and provides an initialization sub-phase before tracking. The circuit utilizes two capacitors in the signal path to enable gain flexibility, providing an accurate output during hold mode. The THA was implemented in 65−nm CMOS technology with a 1.2 V supply voltage. The results of the simulation after layout demonstrate a droop rate of 2.5mV/μS, a hold-mode settling time of 2ns for a 1pF hold capacitor. KW - CMOS KW - Track-and-hold KW - Switched capacitor KW - High-speed KW - Transmission gates KW - Charge injection Y1 - 2025 U6 - https://doi.org/10.23919/IEEECONF67516.2025.11225213 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Killat, Dirk A1 - Pitonak, Pavol A1 - Ulmann, Bernd T1 - High-precision CMOS multiplier with wide dynamic range T2 - 2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS) N2 - Multipliers are an important general-purpose analog function. Precision multipliers are still mostly based on bipolar transistors. In CMOS, small-signal based multipliers are often used as mixers. There are many approaches in CMOS that use the squaring characteristics of the MOSFET, but they do not come close to the accuracy and linearity of bipolar multipliers. This paper presents a new principle and verifies it on a four-quadrant multiplier on a test chip in 65 nm CMOS technology. A new type of input predistortion is used to drive the cascaded differential stage. With a supply voltage of 1.2 V and differential input signals of up to ±700 mV, a linearity of better than 0.5 % of the measurement range is achieved over a wide temperature and frequency range. KW - Multiplier KW - CMOS KW - Linear KW - Gilbert cell Y1 - 2025 SN - 979-8-3315-9585-2 U6 - https://doi.org/10.1109/ICECS66544.2025.11270705 SN - 2995-0589 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER -