TY - PAT A1 - Killat, Dirk T1 - Floating gate programmable cell array for standard CMOS Y1 - 2004 ER - TY - PAT A1 - Killat, Dirk T1 - Comparator with high-voltage inputs in an extended CMOS process for higher voltage levels Y1 - 2004 ER - TY - PAT A1 - Killat, Dirk T1 - Differential gain stage for low voltage supply Y1 - 2006 ER - TY - CHAP A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Li, Ye A1 - Hong, Zhiliang T1 - A 90% Peak Efficiency Single-Inductor Dual-Output Buck-Boost Converter with Extended-PWM Control T2 - 2011 IEEE International Solid-State Circuits Conference digest of technical papers, San Francisco, California, USA, 20 - 24 February 2011 Y1 - 2011 SN - 978-1-61284-303-2 SP - 394 EP - 396 PB - IEEE CY - Piscataway, NJ ER - TY - PAT A1 - Killat, Dirk A1 - Adler, Andreas T1 - Sigma-delta modulator Y1 - 2006 ER - TY - PAT A1 - Xu, Weiwei A1 - Hong, Zhiliang A1 - Killat, Dirk T1 - Switching converter having a plurality N of outputs providing N output signals and at least one inductor and method for controlling such a switching converter Y1 - 2011 ER - TY - CHAP A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Li, Ye A1 - Hong, Zhiliang A1 - Schleifer, Horst T1 - A single-inductor multiple-bipolar-output (SIMBO) converter with fully-adaptive feedback matrix and improved light-load ripple T2 - 2011 proceedings of the ESSCIRC (ESSCIRC 2011), Helsinki, Finland, 12 - 16 September 2011 Y1 - 2011 SN - 978-1-457-70703-2 SP - 435 EP - 438 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Hongcheng, Xu A1 - Zhang, Yi A1 - Ortmanns, M. T1 - An efficiency-enchanced asynchronous buck converter with threshold compensated freewheeling diode T2 - IEEE 2013 International Semiconductor Conference Dresden - Grenoble (ISCDG), September 26 to 27, 2013, Technische Universität Dresden, Germany Y1 - 2013 SN - 978-1-4799-1250-6 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Hongcheng, Xu A1 - Ortmanns, M. T1 - Design of high speed high-voltage drivers based on stacked standard CMOS for various supply voltages T2 - IEEE International Midwest Symposium on Circuits and Systems 2013, (MWSCAS), Columbus, Ohio, August 4 -7 Y1 - 2013 SP - 529 EP - 532 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Hongcheng, Xu T1 - Technique for Reducing On-Resistance of High-Voltage Drivers Based on Stacked Standard CMOS T2 - 9th Conference on Ph. D. Research in Microelectronics and Electronics (PRIME) 2013, Session T1A2, Paper ID 23, Villach, 24 - 27th June 2013 Y1 - 2013 SN - 978-1-4673-4580-4 SP - 185 EP - 188 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk T1 - A current mode 6-bit self-clocked tracking ADC with adaptive clock frequency for DC-DC converters T2 - IEEE International Symposium on Circuits and Systems (ISCAS 2013), Session A1L-H, Paper ID 1418, Peking, 19-23 Mai, 2013 Y1 - 2013 SN - 978-1-4673-5760-9 SP - 145 EP - 148 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Mezger, Florian A1 - Killat, Dirk T1 - Digital observer based current loop control for buck converters - Prototype implementation on an FPGA T2 - 23rd International Symposium on Industrial Electronics (ISIE), Istanbul, June 2014 N2 - Digital observer based current loop control for buck converters - Prototype implementation on an FPGA Y1 - 2014 SP - 1336 EP - 1341 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Mezger, Florian A1 - Killat, Dirk T1 - A digital observer based current loop control for buck converters T2 - 39th Annual Conference of the IEEE Industrial Electronics Society, Wien, November 2013 Y1 - 2013 SP - 181 EP - 186 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Bramburger, Stefan A1 - Hongcheng, Xu A1 - Ortmanns, M. T1 - An LDO using stacked transistors on 65 nm CMOS T2 - 21st European Conference on Circuit Theory and Design (ECCTD), Dresden, September 2013 Y1 - 2013 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of a high-voltage differential amplifier based on stacked low-voltage standard CMOS with different input stages T2 - 38th International Information and Communication Technology, Electronics and Microelectronics (MIPRO), Opatija, Croatia, 2015 N2 - This paper presents the design of a high-voltage differential amplifier using six different pre-input stage circuits to reduce high-voltage input levels to low-voltage signals. The proposed circuits are designed using 65 nm CMOS process technology with a nominal voltage of 2.5 V and a supply voltage of 5 V. The designs are based on stacked low-voltage standard CMOS transistors. The different pre-input stage circuits are compared to each other in terms of their circuit description, drawbacks, advantages and simulation results. The principle of the five designed pre-input stage circuits can be applied to higher voltage range input signals as well. Y1 - 2015 U6 - https://doi.org/10.1109/MIPRO.2015.7160237 SP - 50 EP - 55 PB - IEEE ER - TY - CHAP A1 - Konetzke, Eric A1 - Rutsch, Matthias A1 - Hoffmann, Maik A1 - Unger, Alexander A1 - Golinske, René A1 - Killat, Dirk A1 - Ramadas, Sivaram Nishal A1 - Dixon, Steve A1 - Kupnik, Mario T1 - Phased array transducer for emitting 40-kHz air-coupled ultrasound without grating lobes T2 - Proceedings, IEEE International Ultrasonics Symposium (IUS), 21 Oct - 24 Oct 2015 Y1 - 2015 U6 - https://doi.org/10.1109/ULTSYM.2015.0019 PB - IEEE ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Self-biasing high-voltage driver based on standard CMOS with an adapted level shifter for a wide range of supply voltages T2 - IEEE, Nordic Circuits and Systems Conference (NORCAS), NORCHIP & International Symposium on System-on-Chip (SoC), Oslo, Norway 2015 Y1 - 2015 U6 - https://doi.org/10.1109/NORCHIP.2015.7364405 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of High-Voltage Level Shifters Based on Stacked Standard Transistors for a Wide Range of Supply Voltages T2 - SBCCI'15, Proceedings of the 28th Symposium on Integrated Circuits and Systems Design Y1 - 2015 UR - http://dl.acm.org/citation.cfm?id=2801003 SN - 978-1-4503-3763-2 U6 - https://doi.org/10.1145/2800986.2801003 PB - ACM CY - New York, NY ER - TY - GEN A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - High-voltage circuits for power management on 65 nm CMOS T2 - Advances in Radio Science N2 - This paper presents two high-voltage circuits used in power management, a switching driver for buck converter with optimized on-resistance and a low dropout (LDO) voltage regulator with 2-stacked pMOS pass devices. The circuit design is based on stacked MOSFETs, thus the circuits are technology independent. Y1 - 2015 UR - http://www.adv-radio-sci.net/13/109/2015/ars-13-109-2015.html U6 - https://doi.org/10.5194/ars-13-109-2015 IS - 13 SP - 109 EP - 120 ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of a high-voltage driver based on low-voltage CMOS with an adapted level shifter optimized for a wide range of supply voltage T2 - 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Cairo, Egypt, 6-9 Dec. 2015 N2 - This paper presents the design of a high-voltage driver with an adapted level shifter for switching converters. The proposed HV-driver and level shifter are based on stacked standard CMOS, therefore the design is technology independent. The circuit is designed in 65-nm TSMC technology with a nominal voltage of 2.5 V and optimized for arbitrary supply voltages from 2.6 V to 6.0 V. This range is extended by 41.7% when compared against common drivers and level shifters with the circuit being suitable for a supply voltage range of 2.4 V between 2.6 V and 5.0 V. The total area of the designed level shifter is about 3.8% of that required for similar circuit in previous work. Y1 - 2015 U6 - https://doi.org/10.1109/ICECS.2015.7440235 SP - 5 EP - 8 PB - IEEE ER - TY - PAT A1 - Killat, Dirk A1 - Huang, Yan T1 - Tracking analog-to-digital converter (ADC) with a self-controlled variable clock Y1 - 2013 ER - TY - PAT A1 - Killat, Dirk T1 - Multi-Stage Fully Differential Amplifier with Controlled Common Mode Voltage Y1 - 2013 ER - TY - CHAP A1 - Huang, Yan A1 - Schleifer, Horst A1 - Killat, Dirk T1 - Design and analysis of novel dynamic latched comparator with reduced kickback noise for high-speed ADCs T2 - 21st European Conference on Circuit Theory and Design (ECCTD), Dresden, 2013 Y1 - 2013 U6 - https://doi.org/10.1109/ECCTD.2013.6662236 PB - IEEE CY - Piscataway, NJ ER -