TY - PAT A1 - Killat, Dirk A1 - Adler, Andreas T1 - Sigma-delta modulator Y1 - 2006 ER - TY - PAT A1 - Killat, Dirk T1 - Voltage to current converter Y1 - 2009 ER - TY - CHAP A1 - Killat, Dirk A1 - Krenzke, Rainer A1 - Ji, Cang T1 - A 36-V H-bridge driver interface in a standard 0.35-µm CMOS process Y1 - 2005 ER - TY - CHAP A1 - Killat, Dirk A1 - Salzmann, O. A1 - Baumgartner, A. T1 - A 14-V high speed driver in 5-V-only 0.35-µm standard CMOS Y1 - 2004 ER - TY - CHAP A1 - Killat, Dirk A1 - Baraniecki, Robert T1 - Full digital dimming regulation of fluorescent lamps with -54 dB/Hz light ripple T2 - Conference record of the 2005 IEEE Industry Applications Conference, fortieth IAS annual meeting, 2 - 6 October 2005, Kowloon, Hong Kong, Vol. 4 Y1 - 2005 SN - 0-7803-9208-6 SP - 2734 EP - 2740 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk T1 - A Sub-1-V CMOS Bandgap using Forward Body Bias of the PMOS Differential Pair for Reduction of the Threshold Voltages T2 - Proceedings, 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Oct. 23 - 26, 2006, Shanghai, China Y1 - 2006 SN - 1-424-40160-7 SP - 1692 EP - 1694 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk A1 - Shao, Bin A1 - Yang, Yujia A1 - Hong, Zhiliang A1 - Xu, Chihao T1 - A Capacitive Step-Down Converter Using a Linear Mode Pre-Regulator for Improved Load Regulation T2 - Proceedings, 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Oct. 23 - 26, 2006, Shanghai, China Y1 - 2006 SN - 1-4244-0160-7 SP - 1708 EP - 1710 PB - IEEE CY - Picataway, NJ ER - TY - CHAP A1 - Killat, Dirk T1 - A Low Power and Low 1/f-Noise Transconductance for the Input Stage of a Current Sense A/D Converter T2 - 7th International Conference on ASIC, October 2007, Guilin, China Y1 - 2007 SN - 978-1-4244-1132-0 SP - 277 EP - 280 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Zhu, Xiaoting A1 - Hong, Zhiliang T1 - Design of Single-Inductor Dual-Output Switching Converters with Average Current Mode Control T2 - 2008 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, 30 November - 3 December 2008 Y1 - 2008 SN - 978-1-424-42341-5 SP - 902 EP - 905 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Li, Ye A1 - Gong, Xiaohan A1 - Hong, Zhiliang T1 - A Single-Inductor Dual-Output Switching Converter with Low Ripples and Improved Cross Regulation T2 - 2009 IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13 - 16 September 2009 Y1 - 2009 SN - 978-1-424-44071-9 SP - 303 EP - 306 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk A1 - Li, Ye A1 - Gong, Xiaohan A1 - Xu, Weiwei A1 - Hong, Zhiliang T1 - An experimental extracted model for latchup analysis in CMOS process T2 - IEEE 8th International Conference on ASIC, 2009, ASICON '09, 20 - 23 Oct. 2009, Changsha, China, proceedings Y1 - 2009 SN - 978-1-4244-3868-6 SP - 1035 EP - 1038 PB - IEEE CY - Piscataway, NJ ER - TY - GEN A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Zhu, Xiaoting A1 - Hong, Zhiliang T1 - A single-inductor dual-output switching converter with average current mode control T2 - Journal of Semiconductors Y1 - 2009 SN - 1674-4926 VL - 39 IS - 9 SP - 095012-1 EP - 095012-6 ER - TY - GEN A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Li, Ye A1 - Gong, Xiaohan A1 - Hong, Zhiliang T1 - A Dual-Mode Single-Inductor Dual-Output Switching Converter with Small Ripple T2 - IEEE transactions on power electronics Y1 - 2010 SN - 0885-8993 VL - 25 IS - 3 SP - 614 EP - 623 ER - TY - CHAP A1 - Killat, Dirk A1 - Schmidt, J. A1 - Baumgartner, A. A1 - Baraniecki, Robert A1 - Salzmann, O. T1 - One-chip solution in 0.35 µm standard CMOS for electronic ballasts for fluorescent lamps Y1 - 2003 ER - TY - GEN A1 - Killat, Dirk T1 - A One-Chip Solution for Electronic Ballasts T2 - Power Electronics Technology Y1 - 2004 VL - 30 IS - 3 SP - 22 EP - 27 ER - TY - PAT A1 - Killat, Dirk T1 - Floating gate programmable cell array for standard CMOS Y1 - 2004 ER - TY - PAT A1 - Killat, Dirk T1 - Comparator with high-voltage inputs in an extended CMOS process for higher voltage levels Y1 - 2004 ER - TY - PAT A1 - Killat, Dirk T1 - Differential gain stage for low voltage supply Y1 - 2006 ER - TY - CHAP A1 - Killat, Dirk A1 - Xu, Weiwei A1 - Li, Ye A1 - Hong, Zhiliang T1 - A 90% Peak Efficiency Single-Inductor Dual-Output Buck-Boost Converter with Extended-PWM Control T2 - 2011 IEEE International Solid-State Circuits Conference digest of technical papers, San Francisco, California, USA, 20 - 24 February 2011 Y1 - 2011 SN - 978-1-61284-303-2 SP - 394 EP - 396 PB - IEEE CY - Piscataway, NJ ER - TY - PAT A1 - Killat, Dirk A1 - Haase, Ordwin A1 - Werker, Heinz T1 - Output driving circuit Y1 - 2002 ER - TY - PAT A1 - Killat, Dirk T1 - Circuit for voltage monitoring and for generating a reset signal Y1 - 2000 ER - TY - PAT A1 - Killat, Dirk A1 - Werker, Heinz T1 - Driving Circuit Y1 - 2001 ER - TY - PAT A1 - Killat, Dirk T1 - High voltage push-pull driver on standard CMOS Y1 - 2003 ER - TY - PAT A1 - Killat, Dirk T1 - Digital regulation of fluorescent lamps Y1 - 2003 ER - TY - PAT A1 - Xu, Weiwei A1 - Hong, Zhiliang A1 - Killat, Dirk T1 - Switching converter having a plurality N of outputs providing N output signals and at least one inductor and method for controlling such a switching converter Y1 - 2011 ER - TY - CHAP A1 - Konetzke, Eric A1 - Rutsch, Matthias A1 - Hoffmann, Maik A1 - Unger, Alexander A1 - Golinske, René A1 - Killat, Dirk A1 - Ramadas, Sivaram Nishal A1 - Dixon, Steve A1 - Kupnik, Mario T1 - Phased array transducer for emitting 40-kHz air-coupled ultrasound without grating lobes T2 - Proceedings, IEEE International Ultrasonics Symposium (IUS), 21 Oct - 24 Oct 2015 Y1 - 2015 U6 - https://doi.org/10.1109/ULTSYM.2015.0019 PB - IEEE ER - TY - GEN A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - High-voltage circuits for power management on 65 nm CMOS T2 - Advances in Radio Science N2 - This paper presents two high-voltage circuits used in power management, a switching driver for buck converter with optimized on-resistance and a low dropout (LDO) voltage regulator with 2-stacked pMOS pass devices. The circuit design is based on stacked MOSFETs, thus the circuits are technology independent. Y1 - 2015 UR - http://www.adv-radio-sci.net/13/109/2015/ars-13-109-2015.html U6 - https://doi.org/10.5194/ars-13-109-2015 IS - 13 SP - 109 EP - 120 ER - TY - PAT A1 - Killat, Dirk A1 - Huang, Yan T1 - Tracking analog-to-digital converter (ADC) with a self-controlled variable clock Y1 - 2013 ER - TY - PAT A1 - Killat, Dirk T1 - Multi-Stage Fully Differential Amplifier with Controlled Common Mode Voltage Y1 - 2013 ER - TY - GEN A1 - Killat, Dirk A1 - Kluge, Johannes von A1 - Umbach, Frank A1 - Langenheinrich, Werner A. A1 - Schmitz, Richard T1 - Measurement and modelling of sensitivity and noise of MOS magnetic field-effect transistors T2 - Sensors and Actuators : A, Physical N2 - The characteristics of magnetic field-sensitive split-drain MOSFETs (MAGFETs) have been experimentally measured. The sensitivity depends on the geometry and the operating point of the MAGFET. Particular attention is paid to the lateral parasitic conductance between the split drains. The equivalent spectral noise density of the magnetic flux density is measured. Additionally, a macro-model of the MAGFET has been developed for SPICE. KW - Modelling KW - Magfets KW - Mosfets Y1 - 1997 U6 - https://doi.org/10.1016/S0924-4247(97)80286-5 SN - 0924-4247 VL - 61 IS - 1-3 SP - 346 EP - 351 ER - TY - GEN A1 - Bramburger, Stefan A1 - Zinke, Benny A1 - Killat, Dirk T1 - Interpolation algorithm for asynchronous ADC-data T2 - Advances in radio science N2 - This paper presents a modified interpolation algo- rithm for signals with variable data rate from asynchronous ADCs. The Adaptive weights Conjugate gradient Toeplitz matrix (ACT) algorithm is extended to operate with a contin- uous data stream. An additional preprocessing of data with constant and linear sections and a weighted overlap of step- by-step into spectral domain transformed signals improve the reconstruction of the asycnhronous ADC signal. The interpo- lation method can be used if asynchronous ADC data is fed into synchronous digital signal processing. Y1 - 2017 UR - https://www.adv-radio-sci.net/15/163/2017/ars-15-163-2017.pdf U6 - https://doi.org/10.5194/ars-15-163-2017 SN - 1684-9973 VL - 15 SP - 163 EP - 168 ER - TY - GEN A1 - Pitonak, Pavol A1 - Killat, Dirk A1 - Zhu, Haoran T1 - Einfluss der Taktratensteuerung auf die Genauigkeit asynchroner ADCs T2 - ANALOG 2018, Beiträge der 16. GMM/ITG-Fachtagung, 13.-14. September 2018 in München N2 - Es wurde die Genauigkeit von zwei asynchronen ADCs untersucht; einem Nyquist-Rate Tracking ADC und einem 1-Bit Delta-Sigma-ADC, bei denen die Taktfrequenz selbständig geregelt wird. Speziell wurde die Genauigkeit der ADCs für realistische Signale aus dem Bereich der Automobilindustrie untersucht. Die Analyse erfolgte mithilfe von MATLAB und Simulink. Die Ergebnisse der transienten Simulationen werden dargestellt und bewertet. KW - Taktratensteuerung KW - Genauigkeit asynchroner ADCs KW - asynchroner Delta-Sigma-ADC KW - Nyquist-Rate Tracking ADC Y1 - 2018 UR - https://www.vde-verlag.de/buecher/454754/gmm-fb-91-analog-2018.html SN - 978-3-8007-4754-2 SP - 62 EP - 63 PB - VDE Verlag CY - Berlin ER - TY - GEN A1 - Mendonça, Lucas Sangoi A1 - Radecker, Matthias A1 - Killat, Dirk A1 - Bisogno, Fábio Ecke T1 - Ultrasound Piezo-Harvester Energy Transfer Systems for Machine Tool Sensor-Charger Applications T2 - PCIM Europe : International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, Nuremberg, 07.- 09. May 2019 N2 - Ultrasound energy transfer systems can be an alternative for sensor-chargers aiming battery replacement avoidance and can be used in machine tool applications. An ultrasound input source can be used to send an acoustic signal through a machine. The signal is received by an ultrasound receiver based on piezoelectric component and should be converted into an electrical signal to supply or charge the sensor. Notwithstanding, for rotating machines, an air gap must be considered between the input source and the machine tool part. This paper deals with the acoustic-electrical energy transfer considering the changes in the propagation media of the ultrasound. Theoretical results are verified by means of an experimental setup. Y1 - 2019 UR - https://ieeexplore.ieee.org/xpl/conhome/8767470/proceeding SN - 978-3-8007-4938-6 PB - VDE VERLAG CY - Berlin ER - TY - GEN A1 - Martins, Leandro Tomé A1 - Radecker, Matthias A1 - Fracaro, Marcelo Henrique A1 - Mendonça, Lucas Sangoi A1 - Bisogno, Fábio Ecke A1 - Killat, Dirk T1 - Modeling and Design of a Linear-Assisted Zeta Conveter T2 - 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe) N2 - Linear-assisted switching (PWM) converters have advantages over single switching topologies, mainly because of the reduction or elimination of bulky output capacitors and ultra-fast dynamical response. In this paper, a linear-assisted zeta converter is presented. The linear regulator circuit is composed by three bipolar transistors and an operational amplifier, which drives the transistor based on the error between the output voltage and its reference. The modeling of the whole circuit is presented, as well as a design example. The modeling of the zeta converter is similar to the conventional topology modeling, except the fact that the linear regulator current is considered as an extra state that substitutes the state regarding the output capacitor voltage. The zeta converter can be designed independently of the linear regulator circuit and simulations are used to validate the static operation of the overall topology. Experimental results confirm in practice the ripple compensation of the main zeta converter, where extra current is provided by the main converter, in order to drive the linear regulator that is responsible for the ripple compensation. Y1 - 2019 U6 - https://doi.org/10.23919/EPE.2019.8914764 PB - VDE CY - Berlin ER - TY - GEN A1 - Mendonca, Lucas Sangoi A1 - Radecker, Matthias A1 - Killat, Dirk A1 - Bisogno, Fábio Ecke T1 - Normalized State-Space Models of Resonant Rectifiers T2 - 2019 Kleinheubach Conference, September 23-25, 2019, Miltenberg, Germany N2 - In AC-DC power conversion, the input source features: time dependence and phase angle, combined with the complexity of resonant circuits, lead to solutions that are difficult to obtain. In this sense, an analysis and design methodology of resonant rectifiers is proposed, in which, iterative numerical solutions are replaced by analytic solutions with the help of computer algebra systems. The method allows obtaining the AC-to-DC transfer function, the quality factor, the phase angle and the resonance frequency. A case study for the Class-E zero-derivative voltage switched resonant rectifier is performed. Experimental results are shown in order to validate the theoretical approach. Y1 - 2019 UR - https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8890156 SN - 978-3-948571-00-9 ER - TY - GEN A1 - Bramburger, Stefan A1 - Killat, Dirk T1 - 10-bit tracking ADC with a multi-bit quantizer, variable step size and segmented current-steering DAC T2 - Advances in Radio Science N2 - This paper presents a 10-bit tracking ADC using a multi-bit quantiser and a segmented current-steering DAC. The quantiser allows a dynamical adjustment of the step size dependent on the input signal waveform. This mitigates the limited slew rate of delta encoded ADCs. Energy consumption induced by 1 LSB ripple is removed by the quantiser. The segmented current-steering DAC allows simple control, good monotonicity and improved transient response when compared to previous design as well as potential power reduction. Y1 - 2019 UR - https://ars.copernicus.org/articles/17/161/2019/ U6 - https://doi.org/10.5194/ars-17-161-2019 SN - 1684-9973 SN - 1684-9965 VL - Vol. 17 SP - 161 EP - 167 ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of a high-voltage differential amplifier based on stacked low-voltage standard CMOS with different input stages T2 - 38th International Information and Communication Technology, Electronics and Microelectronics (MIPRO), Opatija, Croatia, 2015 N2 - This paper presents the design of a high-voltage differential amplifier using six different pre-input stage circuits to reduce high-voltage input levels to low-voltage signals. The proposed circuits are designed using 65 nm CMOS process technology with a nominal voltage of 2.5 V and a supply voltage of 5 V. The designs are based on stacked low-voltage standard CMOS transistors. The different pre-input stage circuits are compared to each other in terms of their circuit description, drawbacks, advantages and simulation results. The principle of the five designed pre-input stage circuits can be applied to higher voltage range input signals as well. Y1 - 2015 U6 - https://doi.org/10.1109/MIPRO.2015.7160237 SP - 50 EP - 55 PB - IEEE ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - A high-voltage driver based on stacked low-voltage transistors with minimized on-resistance for a buck converter in 65 nm CMOS T2 - 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), 15-18 May 2016 N2 - This paper presents a high-voltage (HV) driver for switching a buck converter. The circuit is based on 3-stacked CMOS using gate control circuits to drive maximum current which indicates minimized on-resistance of the HV-driver thus achieving faster switching. The circuit is designed and fabricated using 65 nm CMOS TSMC process technology with a nominal voltage of 2.5 V and with a supply voltage of 5.5 V. Since the design is based on stacked CMOS transistors, the circuit is technology-independent. The initial on-resistances of the driver pull-up and the pull-down paths have an improvement of 75% and 36% respectively. Due to a buck converter switched by the designed HV-driver, output voltages in the range of 0.45 V to 2.45 V can be achieved from different high supply voltages in the range of 3.5 V to 5.5 V. The circuit occupies an area of 0.187 mm2. Y1 - 2016 UR - http://ieeexplore.ieee.org/document/7726692/ SN - 978-1-4673-8721-7 SN - 978-1-4673-8722-4 U6 - https://doi.org/10.1109/CCECE.2016.7726692 SP - 1 EP - 5 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Bramburger, Stefan T1 - Design of a high-voltage rail-to-rail error amplifier based on standard CMOS used in an LDO T2 - 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE, 15-18 May 2016 N2 - This paper presents the design of a high-voltage (HV) rail-to-rail error amplifier. This circuit controls the output signal of a low drop-out voltage regulator (LDO) according to the reference voltages and based on stacked standard transistors. The circuit is designed using 65 nm CMOS process technology with a nominal voltage of 2.5 V and is optimized for arbitrary values of supply voltage up to 5.0 V. The error amplifier consists of 3 stages and 2 feedback loops. The stages are internally connected rail-to-rail to achieve high GBW and DC accuracy. The simulation and measurement results for the designed HV-error amplifier show that the output signal of the LDO tracks the reference voltages. The circuit design is technology-independent and compatible with scaled CMOS. Y1 - 2016 UR - http://ieeexplore.ieee.org/document/7726693/ SN - 978-1-4673-8721-7 SN - 978-1-4673-8722-4 U6 - https://doi.org/10.1109/CCECE.2016.7726693 SP - 1 EP - 5 PB - IEEE CY - Piscataway, NJ ER - TY - PAT A1 - Killat, Dirk A1 - Pitonak, Pavol T1 - Analog-Digital-Umsetzer und Verfahren zur Umwandlung eines ursprünglich analogen Signals in ein konvertiertes Digitalsignal Y1 - 2017 ER - TY - PAT A1 - Killat, Dirk A1 - Pitonak, Pavol T1 - Verfahren und Schaltungsanordnung zur reduzierung eines Einflusses eines Taktjitters in einem Delta-Sigma-Modulator Y1 - 2017 ER - TY - PAT A1 - Killat, Dirk A1 - Rombach, Pirmin T1 - Vorrichtung und Verfahren zur berührungslosen Messung von Drehmomenten an Wellen Y1 - 1993 ER - TY - CHAP A1 - Huang, Yan A1 - Schleifer, Horst A1 - Killat, Dirk T1 - Design and analysis of novel dynamic latched comparator with reduced kickback noise for high-speed ADCs T2 - 21st European Conference on Circuit Theory and Design (ECCTD), Dresden, 2013 Y1 - 2013 U6 - https://doi.org/10.1109/ECCTD.2013.6662236 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Killat, Dirk A1 - Kluge, Johannes von A1 - Umbach, Frank A1 - Langenheinrich, Werner A. A1 - Schmitz, Richard T1 - Sensitivity and Noise of MOS magnetic field effect transistors T2 - Proceedings of the 26th European Solid State Device Research Conference, Congress Centre, Bologna, Italy, 9 - 11 September 1996 Y1 - 1996 SN - 2-86332-196-X SP - 111 EP - 114 PB - Ed. Frontieres CY - Gif-sur-Yvette ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of High-Voltage Level Shifters Based on Stacked Standard Transistors for a Wide Range of Supply Voltages T2 - SBCCI'15, Proceedings of the 28th Symposium on Integrated Circuits and Systems Design Y1 - 2015 UR - http://dl.acm.org/citation.cfm?id=2801003 SN - 978-1-4503-3763-2 U6 - https://doi.org/10.1145/2800986.2801003 PB - ACM CY - New York, NY ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Design of a high-voltage driver based on low-voltage CMOS with an adapted level shifter optimized for a wide range of supply voltage T2 - 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Cairo, Egypt, 6-9 Dec. 2015 N2 - This paper presents the design of a high-voltage driver with an adapted level shifter for switching converters. The proposed HV-driver and level shifter are based on stacked standard CMOS, therefore the design is technology independent. The circuit is designed in 65-nm TSMC technology with a nominal voltage of 2.5 V and optimized for arbitrary supply voltages from 2.6 V to 6.0 V. This range is extended by 41.7% when compared against common drivers and level shifters with the circuit being suitable for a supply voltage range of 2.4 V between 2.6 V and 5.0 V. The total area of the designed level shifter is about 3.8% of that required for similar circuit in previous work. Y1 - 2015 U6 - https://doi.org/10.1109/ICECS.2015.7440235 SP - 5 EP - 8 PB - IEEE ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk T1 - Self-biasing high-voltage driver based on standard CMOS with an adapted level shifter for a wide range of supply voltages T2 - IEEE, Nordic Circuits and Systems Conference (NORCAS), NORCHIP & International Symposium on System-on-Chip (SoC), Oslo, Norway 2015 Y1 - 2015 U6 - https://doi.org/10.1109/NORCHIP.2015.7364405 SP - 1 EP - 4 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Mezger, Florian A1 - Killat, Dirk T1 - Digital observer based current loop control for buck converters - Prototype implementation on an FPGA T2 - 23rd International Symposium on Industrial Electronics (ISIE), Istanbul, June 2014 N2 - Digital observer based current loop control for buck converters - Prototype implementation on an FPGA Y1 - 2014 SP - 1336 EP - 1341 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Mezger, Florian A1 - Killat, Dirk T1 - A digital observer based current loop control for buck converters T2 - 39th Annual Conference of the IEEE Industrial Electronics Society, Wien, November 2013 Y1 - 2013 SP - 181 EP - 186 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Pashmineh, Sara A1 - Killat, Dirk A1 - Hongcheng, Xu A1 - Zhang, Yi A1 - Ortmanns, M. T1 - An efficiency-enchanced asynchronous buck converter with threshold compensated freewheeling diode T2 - IEEE 2013 International Semiconductor Conference Dresden - Grenoble (ISCDG), September 26 to 27, 2013, Technische Universität Dresden, Germany Y1 - 2013 SN - 978-1-4799-1250-6 PB - IEEE CY - Piscataway, NJ ER -