TY - BOOK A1 - Hoffmann, Melanie A1 - Anders, Kenneth A1 - Fischer, Lars A1 - Böllmann, Jörg A1 - Brückner, Ardo A1 - Brunk, Ingo A1 - Donath, Helmut A1 - Donat, Ralf A1 - Elmer, Michael A1 - Güth, Mareike A1 - Häußler, Robert A1 - Mrzljak, Jadranka A1 - Mudra, Dieter A1 - Müller, Markus A1 - Peschel, Tim A1 - Pilz, Wilfried A1 - Sawade, Wolfgang A1 - Schonert, P. A1 - Siedschlag, Marina A1 - Siedschlag, Yvonne A1 - Wanner, Manfred A1 - Wöllecke, Jens ED - Hoffmann, Melanie ED - Anders, Kenneth ED - Fischer, Lars T1 - Kolonisten gesucht! Steckbriefe natürlicher und sozialer Besiedler der Bergbaufolgelandschaft Schlabendorfer Felder Y1 - 2010 PB - Büro für Landschaftskommunikation CY - Bad Freienwalde ER - TY - GEN A1 - Rotta, Randolf A1 - Kuban, Robert A1 - Schöps, Mark Simon A1 - Nolte, Jörg T1 - Dealing with Layers of Obfuscation in pseudo-Uniform Memory Architectures T2 - Euro-Par 2016: Parallel Processing Workshops, Euro-Par 2016 International Workshops, Grenoble, France, August 24-26, 2016 N2 - Pseudo-Uniform Memory Architectures hide the memory's throughput bottlenecks and the network's latency differences in order to provide near-peak average throughput for computations on large datasets. This obviates the need for application-level partitioning and load balancing between NUMA domains but the performance of cross-core communication still depends on the actual placement of the involved variables and cores, which can result in significant variation within applications and between application runs. This paper analyses the pseudo-uniform memory latency on the Intel Xeon Phi Knights Corner processor, derives strategies for the optimised placement of important variables, and discusses the role of localised coordination in pUMA systems. For example, a basic cache line ping-pong benchmark showed a 3x speedup between adjacent cores. Therefore, pUMA systems combined with support for controlled placement of small datasets are an interesting option when processor-wide load balancing is difficult while localised coordination is feasible. Y1 - 2016 SN - 978-3-319-58942-8 SN - 978-3-319-58943-5 U6 - https://doi.org/10.1007/978-3-319-58943-5_55 SP - 685 EP - 696 PB - Springer International Publishing CY - Cham ER - TY - GEN A1 - Kuban, Robert A1 - Rotta, Randolf A1 - Nolte, Jörg ED - Heras, Dora B. ED - Bougé, Luc T1 - Help Your Busy Neighbors: Dynamic Multicasts over Static Topologies T2 - Euro-Par 2017: Parallel Processing Workshops KW - multicast KW - shared memory KW - many-core KW - TLB shootdown Y1 - 2018 SN - 978-3-319-75177-1 SN - 978-3-319-75178-8 U6 - https://doi.org/10.1007/978-3-319-75178-8_51 N1 - viele weitere Herausgeber SP - 636 EP - 657 PB - Springer CY - Cham ER -