TY - GEN A1 - Fricke, Florian A1 - Werner, André A1 - Shahin, Keyvan A1 - Werner, Florian A1 - Hübner, Michael T1 - Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture T2 - IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW) Y1 - 2019 SN - 978-1-7281-3510-6 SN - 978-1-7281-3511-3 U6 - https://doi.org/10.1109/IPDPSW.2019.00033 SP - 147 EP - 154 ER - TY - GEN A1 - Fricke, Florian A1 - Scharoba, Stefan A1 - Rachuj, Sebastian A1 - Konopik, Andreas A1 - Kluge, Florian A1 - Hofstetter, Georg A1 - Reichenbach, Marc ED - Orailoglu, Alex ED - Reichenbach, Marc ED - Jung, Matthias T1 - Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning  T2 - Embedded computer systems : architectures, modeling, and simulation : 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, proceedings Y1 - 2022 SN - 978-3-031-15073-9 SN - 978-3-031-15074-6 U6 - https://doi.org/10.1007/978-3-031-15074-6_15 SP - 235 EP - 249 PB - Springer CY - Cham ER - TY - GEN A1 - Fricke, Florian A1 - Mahmood, Safdar A1 - Hoffmann, Javier Eduardo A1 - Ali, Muhammad A1 - Shahin, Keyvan A1 - Hübner, Michael A1 - Göhringer, Diana T1 - Domain Adaptive Processor Architectures T2 - Kommunikation und Bildverarbeitung in der Automation Y1 - 2020 SN - 978-3-662-59895-5 SN - 978-3-662-59894-8 U6 - https://doi.org/10.1007/978-3-662-59895-5_23 SN - 2522-8579 SN - 2522-8587 SP - 315 EP - 330 ER - TY - GEN A1 - Fricke, Florian A1 - Hoffmann, Javier Eduardo A1 - Mahmood, Safdar A1 - Hübner, Michael T1 - A Tool to Ease De­sign-Space-Ex­plo­ra­ti­on Using the Ten­si­li­ca LX7 ASIP T2 - CDN­Li­ve EMEA 2019 KW - ASIP, LX7, Ten­si­li­ca Y1 - 2019 UR - https://www.esit.ruhr-uni-bochum.de/forschung/veroeffentlichungen/tool-ease-design-space-exploration-using-tensilica/ ER -