TY - GEN A1 - Werner, André A1 - Fricke, Florian A1 - Shahin, Keyvan A1 - Werner, Florian A1 - Hübner, Michael ED - Hochberger, Christian ED - Nelson, Brent ED - Koch, Andreas ED - Woods, Roger ED - Diniz, Pedro C. T1 - Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms T2 - Applied Reconfigurable Computing, 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings Y1 - 2019 SN - 978-3-030-17226-8 SN - 978-3-030-17227-5 U6 - https://doi.org/0.1007/978-3-030-17227-5_20 SN - 0302-9743 SN - 1611-3349 SP - 277 EP - 291 PB - Springer CY - Cham ER - TY - GEN A1 - Fricke, Florian A1 - Werner, André A1 - Shahin, Keyvan A1 - Werner, Florian A1 - Hübner, Michael T1 - Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture T2 - IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW) Y1 - 2019 SN - 978-1-7281-3510-6 SN - 978-1-7281-3511-3 U6 - https://doi.org/10.1109/IPDPSW.2019.00033 SP - 147 EP - 154 ER - TY - CHAP A1 - Fricke, Florian A1 - Werner, André A1 - Hübner, Michael T1 - Tool flow for automatic generation of architectures and test-cases to enable the evaluati-on of CGRAs in the context of HPC applications T2 - Conference on Design and Architectures for Signal and Image Processing (DASIP), 27-29 Sept. 2017, Dresden, Germany Y1 - 2017 UR - https://ieeexplore.ieee.org/document/8122124 SN - 978-1-5386-3534-6 U6 - https://doi.org/10.1109/DASIP.2017.8122124 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Mori Alves da Silva, Jones Yudi A1 - Werner, André A1 - Shallufa, Arij A1 - Fricke, Florian A1 - Hübner, Michael T1 - A Design Methodology for the Next Generation Real-Time Vision Processors T2 - Applied reconfigurable computing, 12th international symposium, ARC 2016, Mangaratiba, RJ, Brazil, March 22-24, 2016 Y1 - 2016 SN - 978-3-319-30480-9 SN - 978-3-319-30481-6 SP - 14 EP - 25 PB - Springer CY - Cham ER - TY - CHAP A1 - Mori Alves da Silva, Jones Yudi A1 - Werner, André A1 - Fricke, Florian A1 - Hübner, Michael T1 - A rapid prototyping method to reduce the design time in commercial high-level synthesis tools T2 - 23rd Re­con­fi­gura­ble Ar­chi­tec­tu­res Work­shop (RAW 2016), Chi­ca­go, USA Y1 - 2016 SN - 978-1-5090-3682-0 SP - 253 EP - 258 PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Fricke, Florian A1 - Werner, André A1 - Shahin, Keyvan A1 - Hübner, Michael ED - Voros, Nikolaos ED - Hübner, Michael ED - Keramidas, Georgios ED - Göhringer, Diana ED - Antonopoulos, Christos ED - Diniz, Pedro C. T1 - CGRA Tool Flow for Fast Run-Time Reconfiguration T2 - Proceedings, 14th International Symposium on Applied Reconfigurable Computing, Santorini, Greece, May 2-4, 2018 Y1 - 2018 SN - 978-3-319-78889-0 SN - 978-3-319-78890-6 U6 - https://doi.org/10.1007/978-3-319-78890-6_53 SP - 661 EP - 672 PB - Springer CY - Cham ER - TY - CHAP A1 - Fricke, Florian A1 - Werner, André A1 - Janßen, Benedikt A1 - Hübner, Michael A1 - Ribbe, Clemens A1 - Cengizhan, Inac T1 - Redesign of an Educational Robot Platform Using Web-based Programming T2 - Proceedings of the 2016 Workshop on Embedded and Cyber-Physical Systems Education, Pittsburgh, PA, USA - October 01-07, 2016 Y1 - 2016 SN - 978-1-4503-4657-3 U6 - https://doi.org/10.1145/3005329.3005332 PB - ACM CY - New York, NY ER -