<?xml version="1.0" encoding="utf-8"?>
<export-example>
  <doc>
    <id>27377</id>
    <completedYear/>
    <publishedYear>2021</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject_ref</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-05-03</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Optimized programming algorithms for multilevel RRAM in hardware neural networks</title>
    <abstract language="eng">A key requirement for RRAM in neural network accelerators with a large number of synaptic parameters is the multilevel programming. This is hindered by resistance imprecision due to cycle-to-cycle and device-to-device variations. Here, we compare two multilevel programming algorithms to minimize resistance variations in a 4-kbit array of HfO 2 RRAM. We show that gate-based algorithms have the highest reliability. The optimized scheme is used to implement a neural network with 9-level weights, achieving 91.5% (vs. software 93.27%) in MNIST recognition.</abstract>
    <parentTitle language="eng">IEEE International Reliability Physics Symposium (IRPS), 2021</parentTitle>
    <identifier type="isbn">978-1-7281-6894-4</identifier>
    <identifier type="issn">1938-1891</identifier>
    <identifier type="doi">10.1109/IRPS46558.2021.9405119</identifier>
    <enrichment key="BTU">an der BTU erstellt / created at BTU</enrichment>
    <enrichment key="opus.source">publish</enrichment>
    <enrichment key="opus.doi.autoCreate">false</enrichment>
    <enrichment key="opus.urn.autoCreate">false</enrichment>
    <enrichment key="Fprofil">4 Künstliche Intelligenz und Sensorik / Artificial Intelligence and Sensor Technology</enrichment>
    <author>
      <firstName>Valerio</firstName>
      <lastName>Milo</lastName>
    </author>
    <submitter>
      <firstName>Christian</firstName>
      <lastName>Wenger</lastName>
    </submitter>
    <author>
      <firstName>Francesco</firstName>
      <lastName>Anzalone</lastName>
    </author>
    <author>
      <firstName>Cristian</firstName>
      <lastName>Zambelli</lastName>
    </author>
    <author>
      <firstName>Eduardo</firstName>
      <lastName>Pérez</lastName>
    </author>
    <author>
      <firstName>Mamathamba Kalishettyhalli</firstName>
      <lastName>Mahadevaiah</lastName>
    </author>
    <author>
      <firstName>Óscar G.</firstName>
      <lastName>Ossorio</lastName>
    </author>
    <author>
      <firstName>Piero</firstName>
      <lastName>Olivo</lastName>
    </author>
    <author>
      <firstName>Christian</firstName>
      <lastName>Wenger</lastName>
    </author>
    <author>
      <firstName>Daniele</firstName>
      <lastName>Ielmini</lastName>
    </author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>RRAM</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Multilevel switching</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>neural network</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>memristive switching</value>
    </subject>
    <collection role="institutes" number="1521">FG Halbleitermaterialien</collection>
  </doc>
</export-example>
