@misc{AlsabbaghKimLangendoerfer, author = {Alsabbagh, Wael and Kim, Chaerin and Langend{\"o}rfer, Peter}, title = {No Attacks Are Available: Securing the OpenPLC and Related Systems}, series = {8th GI/ACM Workshop on Industrial Automation and Control Systems (IACS WS 2023), 2085 (2023)}, journal = {8th GI/ACM Workshop on Industrial Automation and Control Systems (IACS WS 2023), 2085 (2023)}, doi = {10.13140/RG.2.2.24570.47043}, pages = {12}, abstract = {The use of Programmable Logic Controllers (PLCs) expands in industrial domains, which makes ensuring the security of Industrial Control Systems (ICSs) become paramount. The OpenPLC project, the first open-source initiative, provides flexible and cost-effective PLC solutions to build up affordable test-beds, as well as conduct experiments and academic researches. This project has wildly grown in the last few years, thus it is essential to address the most emerging security challenges it encounters. This paper introduces a new OpenPLC architecture, called OpenPLC Aqua, provided with a set of security solutions designed specifically to overcome the vulnerabilities that the current OpenPLC versions are prone to. The new OpenPLC architecture includes four security features: 1) user credentials encryption, securing the Webserver, Whitelisting and secure SSL/TLS communication channel. The OpenPLC Aqua software was tested against several attack scenarios, that were feasible against the old OpenPLC versions. Our experimental results showed our enhanced OpenPLC software is secure and resistant against several attack scenarios e.g., authentication, injection, Man-in-the-Middle and replay attacks. The OpenPLC Aqua is publicly available and a proof of concept demo is also published with this paper.}, language = {en} } @misc{LehnigerLangendoerfer, author = {Lehniger, Kai and Langend{\"o}rfer, Peter}, title = {Window Canaries: Re-Thinking Stack Canaries for Architectures With Register Windows}, series = {IEEE Transactions on Dependable and Secure Computing}, volume = {20}, journal = {IEEE Transactions on Dependable and Secure Computing}, number = {6}, issn = {1941-0018}, doi = {10.1109/TDSC.2022.3230748}, pages = {4637 -- 4647}, abstract = {his paper presents Window Canaries, a novel approach to Stack Canaries for architectures with a register window that protects return addresses and stack pointers without the need of adding additional instruction to each potentially vulnerable function. Instead, placement and check of the canary word is moved to window exception handlers that are responsible to handle register window overflows and underflows. The approach offers low performance overhead while guaranteeing that return addresses are protected by stack buffer overflows without relying on a heuristic that decides which functions to instrument. The contributions of this paper are a complete implementation of the approach for the Xtensa LX architecture with register window option as well as a performance evaluation and discussion of advantages and drawbacks.}, language = {en} } @incollection{LangendoerferKornemannAlsabbaghetal., author = {Langend{\"o}rfer, Peter and Kornemann, Stephan and Alsabbagh, Wael and Hermann, Erik}, title = {Information Security: The Cornerstone for Surviving the Digital Wild}, series = {The Future of Smart Production for SMEs: A Methodological and Practical Approach Towards Digitalization in SMEs}, booktitle = {The Future of Smart Production for SMEs: A Methodological and Practical Approach Towards Digitalization in SMEs}, publisher = {Springer International Publishing}, address = {Cham}, isbn = {978-3-031-15428-7}, doi = {10.1007/978-3-031-15428-7_29}, pages = {335 -- 341}, abstract = {In this chapter we are discussing the very basics in the sense of how to prepare your company with respect to security. The essential issues are a proper information security governance framework that takes into account the managerial and organizational issues as well as proper technical means. For the latter we introduce network separation as this is one of the prime means to protect your production network from network based attacks.}, language = {en} } @misc{AssafoLautschSuawaetal., author = {Assafo, Maryam and Lautsch, Martin and Suawa, Priscile Fogou and Jongmanns, Marcel and H{\"u}bner, Michael and Reichenbach, Marc and Brockmann, Carsten and Reinhardt, Denis and Langend{\"o}rfer, Peter}, title = {The ForTune Toolbox: Building Solutions for Condition-Based and Predictive Maintenance Focusing on Retrofitting}, publisher = {VDE Verlag}, address = {Berlin}, isbn = {978-3-8007-6204-0}, pages = {S. 541}, language = {en} } @misc{SigourouKabinLangendoerferetal., author = {Sigourou, Alkistis and Kabin, Ievgen and Langend{\"o}rfer, Peter and Sklavos, Nicolas and Dyka, Zoya}, title = {Successful Simple Side Channel Analysis: Vulnerability of an Atomic Pattern kP Algorithm Implemented with a Constant Time Crypto Library to Simple Electromagnetic Analysis Attacks}, series = {12th Mediterranean Conference on Embedded Computing (MECO 2023), 167 (2023)}, journal = {12th Mediterranean Conference on Embedded Computing (MECO 2023), 167 (2023)}, isbn = {979-8-3503-2291-0}, issn = {2637-9511}, doi = {10.1109/MECO58584.2023.10154940}, pages = {6}, language = {en} } @misc{KabinDykaLangendoerfer, author = {Kabin, Ievgen and Dyka, Zoya and Langend{\"o}rfer, Peter}, title = {Randomized Addressing Countermeasures are Inefficient against Address-Bit SCA}, series = {IEEE International Conference on Cyber Security and Resilience (CSR 2023), 580 (2023)}, journal = {IEEE International Conference on Cyber Security and Resilience (CSR 2023), 580 (2023)}, isbn = {979-8-3503-1170-9}, doi = {10.1109/CSR57506.2023.10224968}, pages = {6}, language = {en} } @misc{AlsabbaghKimLangendoerfer, author = {Alsabbagh, Wael and Kim, Chaerin and Langend{\"o}rfer, Peter}, title = {Good Night, and Good Luck: A Control Logic Injection Attack on OpenPLC}, series = {Proc. 49th Annual Conference of the IEEE Industrial Electronics Society (IECON 2023), (2023)}, journal = {Proc. 49th Annual Conference of the IEEE Industrial Electronics Society (IECON 2023), (2023)}, doi = {10.13140/RG.2.2.32913.20321}, pages = {8}, language = {en} } @misc{LehnigerLangendoerfer, author = {Lehniger, Kai and Langend{\"o}rfer, Peter}, title = {Through the Window: Exploitation and Countermeasures of the ESP32 Register Window Overflow}, series = {Future Internet}, volume = {15}, journal = {Future Internet}, number = {6}, issn = {1999-5903}, doi = {10.3390/fi15060217}, abstract = {With the increasing popularity of IoT (Internet-of-Things) devices, their security becomes an increasingly important issue. Buffer overflow vulnerabilities have been known for decades, but are still relevant, especially for embedded devices where certain security measures cannot be implemented due to hardware restrictions or simply due to their impact on performance. Therefore, many buffer overflow detection mechanisms check for overflows only before critical data are used. All data that an attacker could use for his own purposes can be considered critical. It is, therefore, essential that all critical data are checked between writing a buffer and its usage. This paper presents a vulnerability of the ESP32 microcontroller, used in millions of IoT devices, that is based on a pointer that is not protected by classic buffer overflow detection mechanisms such as Stack Canaries or Shadow Stacks. This paper discusses the implications of vulnerability and presents mitigation techniques, including a patch, that fixes the vulnerability. The overhead of the patch is evaluated using simulation as well as an ESP32-WROVER-E development board. We showed that, in the simulation with 32 general-purpose registers, the overhead for the CoreMark benchmark ranges between 0.1\% and 0.4\%. On the ESP32, which uses an Xtensa LX6 core with 64 general-purpose registers, the overhead went down to below 0.01\%. A worst-case scenario, modeled by a synthetic benchmark, showed overheads up to 9.68\%.}, language = {en} } @misc{AftowiczKabinDykaetal., author = {Aftowicz, Marcin and Kabin, Ievgen and Dyka, Zoya and Langend{\"o}rfer, Peter}, title = {Non-Profiled Unsupervised Horizontal Iterative Attack against Hardware Elliptic Curve Scalar Multiplication Using Machine Learning}, series = {Future Internet}, volume = {16}, journal = {Future Internet}, number = {2}, issn = {1999-5903}, doi = {10.3390/fi16020045}, abstract = {While IoT technology makes industries, cities, and homes smarter, it also opens the door to security risks. With the right equipment and physical access to the devices, the attacker can leverage side-channel information, like timing, power consumption, or electromagnetic emanation, to compromise cryptographic operations and extract the secret key. This work presents a side channel analysis of a cryptographic hardware accelerator for the Elliptic Curve Scalar Multiplication operation, implemented in a Field-Programmable Gate Array and as an Application-Specific Integrated Circuit. The presented framework consists of initial key extraction using a state-of-the-art statistical horizontal attack and is followed by regularized Artificial Neural Networks, which take, as input, the partially incorrect key guesses from the horizontal attack and correct them iteratively. The initial correctness of the horizontal attack, measured as the fraction of correctly extracted bits of the secret key, was improved from 75\% to 98\% by applying the iterative learning.}, language = {en} } @misc{FoersterLangendoerferHinze, author = {F{\"o}rster, Benjamin and Langend{\"o}rfer, Peter and Hinze, Thomas}, title = {Determining Distributions of Security Means for WSNs Based on the Model of a Neighborhood Watch}, series = {IEEE Access}, volume = {12}, journal = {IEEE Access}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, issn = {2169-3536}, doi = {10.1109/ACCESS.2024.3404816}, pages = {74343 -- 74366}, language = {en} } @misc{AftowiczKabinDykaetal., author = {Aftowicz, Marcin and Kabin, Ievgen and Dyka, Zoya and Langend{\"o}rfer, Peter}, title = {Advantages of unsupervised learning analysis methods in single-trace SCA attacks}, series = {Microprocessors and Microsystems}, volume = {105}, journal = {Microprocessors and Microsystems}, publisher = {Elsevier BV}, issn = {0141-9331}, doi = {10.1016/j.micpro.2023.104994}, pages = {10}, language = {en} }