@book{HoffmannAndersFischeretal., author = {Hoffmann, Melanie and Anders, Kenneth and Fischer, Lars and B{\"o}llmann, J{\"o}rg and Br{\"u}ckner, Ardo and Brunk, Ingo and Donath, Helmut and Donat, Ralf and Elmer, Michael and G{\"u}th, Mareike and H{\"a}ußler, Robert and Mrzljak, Jadranka and Mudra, Dieter and M{\"u}ller, Markus and Peschel, Tim and Pilz, Wilfried and Sawade, Wolfgang and Schonert, P. and Siedschlag, Marina and Siedschlag, Yvonne and Wanner, Manfred and W{\"o}llecke, Jens}, title = {Kolonisten gesucht! Steckbriefe nat{\"u}rlicher und sozialer Besiedler der Bergbaufolgelandschaft Schlabendorfer Felder}, editor = {Hoffmann, Melanie and Anders, Kenneth and Fischer, Lars}, publisher = {B{\"u}ro f{\"u}r Landschaftskommunikation}, address = {Bad Freienwalde}, pages = {52}, language = {de} } @misc{RottaKubanSchoepsetal., author = {Rotta, Randolf and Kuban, Robert and Sch{\"o}ps, Mark Simon and Nolte, J{\"o}rg}, title = {Dealing with Layers of Obfuscation in pseudo-Uniform Memory Architectures}, series = {Euro-Par 2016: Parallel Processing Workshops, Euro-Par 2016 International Workshops, Grenoble, France, August 24-26, 2016}, journal = {Euro-Par 2016: Parallel Processing Workshops, Euro-Par 2016 International Workshops, Grenoble, France, August 24-26, 2016}, publisher = {Springer International Publishing}, address = {Cham}, isbn = {978-3-319-58942-8}, doi = {10.1007/978-3-319-58943-5_55}, pages = {685 -- 696}, abstract = {Pseudo-Uniform Memory Architectures hide the memory's throughput bottlenecks and the network's latency differences in order to provide near-peak average throughput for computations on large datasets. This obviates the need for application-level partitioning and load balancing between NUMA domains but the performance of cross-core communication still depends on the actual placement of the involved variables and cores, which can result in significant variation within applications and between application runs. This paper analyses the pseudo-uniform memory latency on the Intel Xeon Phi Knights Corner processor, derives strategies for the optimised placement of important variables, and discusses the role of localised coordination in pUMA systems. For example, a basic cache line ping-pong benchmark showed a 3x speedup between adjacent cores. Therefore, pUMA systems combined with support for controlled placement of small datasets are an interesting option when processor-wide load balancing is difficult while localised coordination is feasible.}, language = {en} } @misc{KubanRottaNolte, author = {Kuban, Robert and Rotta, Randolf and Nolte, J{\"o}rg}, title = {Help Your Busy Neighbors: Dynamic Multicasts over Static Topologies}, series = {Euro-Par 2017: Parallel Processing Workshops}, journal = {Euro-Par 2017: Parallel Processing Workshops}, editor = {Heras, Dora B. and Boug{\´e}, Luc}, publisher = {Springer}, address = {Cham}, isbn = {978-3-319-75177-1}, doi = {10.1007/978-3-319-75178-8_51}, pages = {636 -- 657}, language = {en} }