@misc{RottaSegabinazziFerreiraNolte, author = {Rotta, Randolf and Segabinazzi Ferreira, Raphael and Nolte, J{\"o}rg}, title = {Real-time dynamic hardware reconfiguration for processors with redundant functional units}, series = {Proceedings of the 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)}, journal = {Proceedings of the 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)}, publisher = {Institute of Electrical and Electronics Engineers Inc. (IEEE)}, address = {Nashville, TN, USA}, isbn = {978-1-7281-6958-3}, issn = {2375-5261}, doi = {10.1109/ISORC49007.2020.00035}, pages = {2}, abstract = {The tiny logic elements in modern integrated circuits increase the rate of transient failures significantly. Therefore, redundancy on various levels is necessary to retain reliability. However, for mixed-criticality scenarios, the typical processor designs offer either too little fault-tolerance or too much redundancy for one part of the applications. Amongst others, we specifically address redundant processor internal functional units (FU) to cope with transient errors and support wear leveling. A real-time operating system (RTOS) was extended to control our prototypical hardware platform and, since it can be configured deterministically within few clock cycles, we are able to reconfigure the FUs dynamically, at process switching time, according to the specified critically of the running processes. Our mechanisms were integrated into the Plasma processor and the Plasma-RTOS. With few changes to the original software code, it was, for example, possible to quickly change from fault-detecting to fault-correcting modes of the processor on demand.}, language = {en} } @misc{BuechnerHasaniLopacinskietal., author = {B{\"u}chner, Steffen and Hasani, Alireza and Lopacinski, Lukasz and Kraemer, Rolf and Nolte, J{\"o}rg}, title = {100 Gbit/s End-to-End Communication: Adding Flexibility with Protocol Templates}, series = {2018 IEEE 43rd Conference on Local Computer Networks (LCN)}, journal = {2018 IEEE 43rd Conference on Local Computer Networks (LCN)}, edition = {1. Auflage}, isbn = {978-1-5386-4413-3}, issn = {0742-1303}, doi = {10.1109/LCN.2018.8638078}, pages = {263 -- 266}, abstract = {High-speed protocol processing that provides data-rates of 100 Gbit/s and beyond to the application stresses the whole communication system up to its outer limits. Such a system can only be utilized by employing highly specialized, application specific protocols, that are tailored for certain communication parameters, such as the packet loss rate. However, the requirements for most applications are not static, and a protocol designer cannot anticipate all possible communication conditions upfront. The contradiction between specialized protocols and unknown communication parameters can be solved by adapting the protocol implementation on demand to the current communication conditions. However, such an approach needs a protocol description language that allows the automatic specialization of protocols. In this paper, we present the Protocol Engine Template Language (PETL), that allows the automatic implementation of protocols by a constructive approach for a variety of communication conditions from protocol implementation templates.}, language = {en} } @misc{EichlerHofmeierReifetal., author = {Eichler, Christian and Hofmeier, Henriette and Reif, Stefan and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Neverlast: Towards the Design und Implementation of the NVM-based Everlasting Operating System}, series = {Hawaii International Conference on System Sciences 2021 - HICSS-54}, journal = {Hawaii International Conference on System Sciences 2021 - HICSS-54}, publisher = {Scholarspace}, doi = {10.24251/HICSS.2021.870}, pages = {7227 -- 7236}, language = {en} } @misc{KoehlerHerzogHoenigetal., author = {K{\"o}hler, Sven and Herzog, Benedict and H{\"o}nig, Timo and Wenzel, Lukas and Plauth, Max and Nolte, J{\"o}rg and Polze, Andreas and Schr{\"o}der-Preikschat, Wolfgang}, title = {Pinpoint the Joules: Unifying Runtime-Support for Energy Measurements on Heterogeneous Systems}, series = {2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS)}, volume = {1}, journal = {2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS)}, publisher = {IEEE Xplore}, pages = {31 -- 40}, abstract = {For the design and operation of today's computer systems, power and energy requirements are highest priorities. Unlike performance analyses, however, power and energy measurements of heterogeneous systems are difficult to conduct. Especially at the system-software level, performing power and energy measurements remains challenging. Yet, such measurements are essential to improve software components for low power and high energy-efficiency.In this paper, we analyze and discuss the power and energy characteristics of several heterogeneous systems with up to 20 cores (160 hardware threads) and 1 TB of main memory. For the analyzed systems, we outline challenges regarding power and energy measurements and show ways to overcome limitations (i.e., sampling constraints). To improve the current state of the art in power and energy measurements at the system-software level, we present the design and implementation of PINPOINT, an energy-profiling tool which unifies different power and energy measurement interfaces.}, language = {en} } @misc{GierschNolte, author = {Giersch, Oliver and Nolte, J{\"o}rg}, title = {Fast and Portable Concurrent FIFO Queues with Deterministic Memory Reclamation}, series = {IEEE Transactions on Parallel and Distributed Systems (TPDS)}, volume = {33}, journal = {IEEE Transactions on Parallel and Distributed Systems (TPDS)}, number = {3}, issn = {1045-9219}, doi = {10.1109/TPDS.2021.3097901}, pages = {604 -- 616}, language = {en} } @misc{KoeppenTraueBorchertetal., author = {K{\"o}ppen, Marcel and Traue, Jana and Borchert, Christoph and Nolte, J{\"o}rg and Spinczyk, Olaf}, title = {Cache-Line Transactions: Building Blocks for Persistent Kernel Data Structures Enabled by AspectC++}, series = {PLOS '19, Proceedings of the 10th Workshop on Programming Languages and Operating Systems}, journal = {PLOS '19, Proceedings of the 10th Workshop on Programming Languages and Operating Systems}, editor = {Hawblitzel, Chris and Muller, Gilles and Spinczyk, Olaf}, publisher = {acm, The Association for Computing Machinery}, address = {New York}, isbn = {978-1-4503-7017-2}, doi = {10.1145/3365137.3365396}, pages = {38 -- 44}, language = {en} } @misc{SchmausPfeifferHoenigetal., author = {Schmaus, Florian and Pfeiffer, Nicolas and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Nowa: A Wait-Free Continuation-Stealing Concurrency Platform}, series = {2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, journal = {2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, publisher = {IEEE}, isbn = {978-1-6654-4066-0}, doi = {10.1109/IPDPS49936.2021.00044}, pages = {360 -- 371}, language = {en} } @misc{ChatharajupalliRottaKarnapkeetal., author = {Chatharajupalli, Navya Sneha and Rotta, Randolf and Karnapke, Reinhardt and Nolte, J{\"o}rg}, title = {Assessing the Feasibility of Combined BLE and Wi-Fi Communication for High Data Sensing Applications}, series = {EWSN '23: Proceedings of the 2023 International Conference on Embedded Wireless Systems and Networks}, journal = {EWSN '23: Proceedings of the 2023 International Conference on Embedded Wireless Systems and Networks}, publisher = {Association for Computing Machinery}, address = {New York}, doi = {10.5555/3639940.3639948}, pages = {56 -- 59}, abstract = {Advanced sensors generate more data than can be transmitted using classic battery-powered wireless sensor networks. While using Wi-Fi would provide plenty of throughput, the receivers are energy hungry and, thus, the radio time needs to be reduced. Previous research suggests to combine Wi-Fi with low-power technologies such as BLE for an energy efficient coordination of the Wi-Fi radios. Existing approaches focus on individual point-to-point routes whereas certain applications require concurrent transmissions. We evaluated the combination of BLE and Wi-Fi on the ESP32-S3 multi-radio microcontroller through detailed energy and throughput measurements. The results show that established BLE connections allow to activateWi-Fi quickly on-demand; the energy efficiency of the data transmission is significantly improved over previous works but the BLE connection setup is prohibitively slow. While the combination of BLE and Wi-Fi provides high throughput with good energy efficiency, careful design of the BLE-based signalling protocol is necessary to also achieve low latency.}, language = {en} } @inproceedings{ChatharajupalliRottaNolte, author = {Chatharajupalli, Navya Sneha and Rotta, Randolf and Nolte, J{\"o}rg}, title = {P2 - VibroMote: Energy efficient Vibration Monitoring for Railway tracks and Bridges}, series = {iCCC2024 - iCampµs Cottbus Conference 2024-05-14 - 2024-05-16}, booktitle = {iCCC2024 - iCampµs Cottbus Conference 2024-05-14 - 2024-05-16}, publisher = {AMA Service GmbH, Von-M{\"u}nchhausen-Str. 49, 31515 Wunstorf, Germany}, isbn = {978-3-910600-00-3}, doi = {10.5162/iCCC2024/P2}, pages = {123 -- 126}, abstract = {Filtering, storing, and transmitting measurements of high-resolution sensors within a limited energy budget is challenging. For instance, a 3-axis MEMS acceleration sensor for structural condition monitoring and predictive maintenance generates up to 160 kB/s at a sampling rate of 26.6 kHz. This paper discusses the design space with focus on solar harvesting solutions. VibroMote is an energy efficient sensor node that combines a multi-radio micro-controller, an ultra-low power co-processor with persistent memory, a solar harvester, and multiple energy storage options. This enables prototyping of solar-powered long-term data acquisition, in-node processing, and wireless networking for high-resolution sensors.}, language = {en} } @misc{RabensteinNguyenGierschetal., author = {Rabenstein, Jonas and Nguyen, Dustin and Giersch, Oliver and Eichler, Christian and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Back to the core-memory age: running operating systems in NVRAM only}, series = {Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023}, journal = {Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023}, editor = {Goumas, Georgios and Tomforde, Sven and Brehm, J{\"u}rgen and Wildermann, Stefan and Pionteck, Thilo}, publisher = {Springer-Verlag}, isbn = {978-3-031-42784-8}, doi = {10.1007/978-3-031-42785-5_11}, pages = {153 -- 167}, abstract = {The classic core memory was completely non-volatile and thus kept at least part of the operating system persistently in main memory, even over power cycles. Nowadays we can repeat this approach with NVRAM, but with terabytes of main memory on a completely different scale and with parts of the operating-system state stored in volatile CPU caches. In this paper, we discuss our experiences of running large modern operating systems including their applications entirely in NVRAM. We adapted stock Linux and FreeBSD kernels to work exclusively with NVRAM by hiding all DRAM from the kernels at boot time to establish a realistic performance baseline without changing anything else. Following this entirely NVRAM-agnostic approach, we could observe an effective performance penalty of a factor of about four, but only negligible increases in whole-system power draw. For our system with two CPU sockets and 56 cores total, we also observed a reduction in power draw in several scenarios. Due to prolonged execution times, the energy consumption increased as well for these measured workloads. While this might be discouraging at first sight, this result was achieved without any performance tuning as to the specific characteristics of today's NVRAM technology. Therefore, we are also discussing means to mitigate the observed shortcomings by integrating NVRAM appropriately into the memory hierarchy of future robust persistent systems.}, language = {en} } @misc{GierschNguyenNolteetal., author = {Giersch, Oliver and Nguyen, Dustin and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Virtual memory revisited for tiered memory}, series = {Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems}, journal = {Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems}, publisher = {ACM}, address = {New York, NY, USA}, isbn = {979-8-4007-1105-3}, doi = {10.1145/3678015.3680475}, pages = {1 -- 7}, abstract = {The landscape of memory technologies has grown substantially more diverse and heterogeneous, with a number of special-purpose memory technologies reaching market maturity in recent years, such as NVRAM (Non-Volatile Memory), HBM (High-Bandwidth Memory) or the upcoming CXL.mem. Future computing systems will have to contend with byte-addressable and cache-coherent main memory that is highly diverse, either in terms of the fundamental performance characteristics of its underlying memory technology, or due to the fact that CXL.mem will allow accessing homogenous but remote memory. The VM (Virtual Memory) subsystems of today have been empirically optimized over decades, but were designed for a single tier of main memory only. While recent approaches that integrated tiered memory have focused on better memory access metrics to improve page placement strategies, we seek to leverage the proven heuristics that are already in place. In times of high load we assign pages from slower memory, demote inactive pages according to standard page replacement strategies and use lazy page promotions when sufficient resources are available again to retain the inherently high reactivity of demand paging with regard to working set changes. We integrate these mechanisms into the VM subsystem of a full-featured mainstream operating system (FreeBSD) with minimal adaptations. The resulting multi-tier VM system runs in a stable and efficient manner under high stress even with highly unfavorable work loads.}, language = {en} } @misc{RottaChatharajupalliNaumannetal., author = {Rotta, Randolf and Chatharajupalli, Navya Sneha and Naumann, Billy and Schulz, Julius and Karnapke, Reinhardt and Werner, Matthias and Nolte, J{\"o}rg}, title = {Demo: B.A.T.M.A.N. mesh routing on ultra low-power IEEE 802.11 modules}, series = {2024 IEEE 49th Conference on Local Computer Networks (LCN)}, journal = {2024 IEEE 49th Conference on Local Computer Networks (LCN)}, publisher = {IEEE}, isbn = {979-8-3503-8800-8}, issn = {2832-1421}, doi = {10.1109/LCN60385.2024.10639789}, pages = {4}, abstract = {When implementing multi-hop mesh network protocols, efficient direct communication, route discovery, and route repair are crucial to achieve high network throughput. To our knowledge, there is no open mesh routing protocol available for ultra low power IEEE 802.11 modules. Previous work relied on single board computers like Raspberry Pi. We implemented the B.A.T.M.A.N. mesh protocol on the popular Espressif ESP32 along with a novel hybrid rate adaptation for the selection of efficient routes. In this demo we showcase challenges and solutions related to the implementation on ESP32 and how the hybrid rate adaptation improves end-to-end throughput.}, language = {en} }