@misc{SegabinazziFerreiraNolte, author = {Segabinazzi Ferreira, Raphael and Nolte, J{\"o}rg}, title = {Low latency reconfiguration mechanism for fine-grained processor internal functional units}, series = {2019 IEEE Latin American Test Symposium (LATS)}, journal = {2019 IEEE Latin American Test Symposium (LATS)}, isbn = {978-1-7281-1756-0}, issn = {2373-0862}, doi = {10.1109/LATW.2019.8704560}, pages = {6}, abstract = {The strive for performance, low power consumption, and less chip area have been diminishing the reliability and the time to fault occurrences due to wear out of electronic devices. Recent research has shown that functional units within processors usually execute a different amount of operations when running programs. Therefore, these units present different individual wear out during their lifetime. Most existent schemes for reconfiguration of processors due to fault detection and other processor parameters are done at the level of cores which is a costly way to achieve redundancy. This paper presents a low latency (approximately 1 clock cycle) software controlled mechanism to reconfigure units within processor cores according to predefined parameters. Such reconfiguration capability delivers features like wear out balance of processor functional units, configuration of units according to the criticality of tasks running on an operating system and configurations to gain in performance (e.g. parallel execution) when possible. The focus of this paper is to show the implemented low latency reconfiguration mechanism and highlight its possible main features.}, language = {en} } @misc{SegabinazziFerreiraGeorgeChenetal., author = {Segabinazzi Ferreira, Raphael and George, Nevin and Chen, Junchao and H{\"u}bner, Michael and Krstic, Milos and Nolte, J{\"o}rg and Vierhaus, Heinrich Theodor}, title = {Configurable Fault Tolerant Circuits and System Level Integration for Self-Awareness}, series = {Proceedings of the Work in Progress Session held in connection with SEAA 2019, the 45th EUROMICRO Conference on Software Engineering and Advanced Applications and DSD 2019, the 22nd EUROMICRO Conference on Digital System Design}, journal = {Proceedings of the Work in Progress Session held in connection with SEAA 2019, the 45th EUROMICRO Conference on Software Engineering and Advanced Applications and DSD 2019, the 22nd EUROMICRO Conference on Digital System Design}, publisher = {SEA-Publications}, address = {Kallithea, Chalkidiki (Greece)}, isbn = {978-3-902457-54-7}, doi = {10.26127/BTUOpen-5050}, pages = {2}, abstract = {Scaling minimum features of ICs down to the 10nm- area and below has allowed high integration rates in electronics. Scaling at supply voltages of 1V and below also implies a rising level of stress which drives aging effects that reduce switching speed and the expected life time. Additionally, vulnerability from particle radiation is increased. Hence, fault detection and on- line correction become a must for many applications. However, not only fault tolerance but self-awareness becomes also an advantage. Provided that by being aware of its own healthy state allow optimized configurations regarding system operation modes and configurable hardware mechanism. This paper shows a preliminary work in a configurable circuit and explores its configuration possibilities when integrated into a complete system.}, language = {en} } @misc{JenihhinHamdiouiSonzaReordaetal., author = {Jenihhin, Maksim and Hamdioui, Said and Sonza-Reorda, Matteo and Krstic, Milos and Langend{\"o}rfer, Peter and Sauer, Christian and Klotz, Anton and H{\"u}bner, Michael and Nolte, J{\"o}rg and Vierhaus, Heinrich Theodor and Selimis, Georgions and Alexandrescu, Dan and Taouil, Mottaqiallah and Schrijen, Geert-Jan and Sterpone, Luca and Squillero, Giovanni and Dyka, Zoya and Raik, Jaan}, title = {RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems}, series = {ArXiv.org}, journal = {ArXiv.org}, pages = {7}, language = {en} } @misc{HasaniLopacinskiBuechneretal., author = {Hasani, Alireza and Lopacinski, Lukasz and B{\"u}chner, Steffen and Nolte, J{\"o}rg and Kraemer, Rolf}, title = {A Modified Shuffling Method to Split the Critical Path Delay in Layered Decoding of QC-LDPC Codes}, series = {30th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2019), Istanbul, Turkey, 08 - 11 September 2019}, journal = {30th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2019), Istanbul, Turkey, 08 - 11 September 2019}, isbn = {978-1-5386-8110-7}, issn = {2166-9589}, doi = {10.1109/PIMRC.2019.8904435}, language = {en} } @misc{HasaniLopacinskiBuechneretal., author = {Hasani, Alireza and Lopacinski, Lukasz and B{\"u}chner, Steffen and Nolte, J{\"o}rg and Kraemer, Rolf}, title = {An Unnoticed Property in QC-LDPC Codes to Find the Message from the Codeword in Non-Systematic Codes}, series = {28th European Conference on Networks and Communications (EuCNC 2019), Valencia, Spain, 18 - 21 June 2019}, journal = {28th European Conference on Networks and Communications (EuCNC 2019), Valencia, Spain, 18 - 21 June 2019}, publisher = {IEEE}, isbn = {978-1-7281-0546-8}, issn = {2575-4912}, doi = {10.1109/EuCNC.2019.8801957}, pages = {4}, language = {en} } @misc{KoeppenTraueBorchertetal., author = {K{\"o}ppen, Marcel and Traue, Jana and Borchert, Christoph and Nolte, J{\"o}rg and Spinczyk, Olaf}, title = {Cache-Line Transactions: Building Blocks for Persistent Kernel Data Structures Enabled by AspectC++}, series = {PLOS '19, Proceedings of the 10th Workshop on Programming Languages and Operating Systems}, journal = {PLOS '19, Proceedings of the 10th Workshop on Programming Languages and Operating Systems}, editor = {Hawblitzel, Chris and Muller, Gilles and Spinczyk, Olaf}, publisher = {acm, The Association for Computing Machinery}, address = {New York}, isbn = {978-1-4503-7017-2}, doi = {10.1145/3365137.3365396}, pages = {38 -- 44}, language = {en} }