@misc{EichlerHofmeierReifetal., author = {Eichler, Christian and Hofmeier, Henriette and Reif, Stefan and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Neverlast: Towards the Design und Implementation of the NVM-based Everlasting Operating System}, series = {Hawaii International Conference on System Sciences 2021 - HICSS-54}, journal = {Hawaii International Conference on System Sciences 2021 - HICSS-54}, publisher = {Scholarspace}, doi = {10.24251/HICSS.2021.870}, pages = {7227 -- 7236}, language = {en} } @misc{KoehlerHerzogHoenigetal., author = {K{\"o}hler, Sven and Herzog, Benedict and H{\"o}nig, Timo and Wenzel, Lukas and Plauth, Max and Nolte, J{\"o}rg and Polze, Andreas and Schr{\"o}der-Preikschat, Wolfgang}, title = {Pinpoint the Joules: Unifying Runtime-Support for Energy Measurements on Heterogeneous Systems}, series = {2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS)}, volume = {1}, journal = {2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS)}, publisher = {IEEE Xplore}, pages = {31 -- 40}, abstract = {For the design and operation of today's computer systems, power and energy requirements are highest priorities. Unlike performance analyses, however, power and energy measurements of heterogeneous systems are difficult to conduct. Especially at the system-software level, performing power and energy measurements remains challenging. Yet, such measurements are essential to improve software components for low power and high energy-efficiency.In this paper, we analyze and discuss the power and energy characteristics of several heterogeneous systems with up to 20 cores (160 hardware threads) and 1 TB of main memory. For the analyzed systems, we outline challenges regarding power and energy measurements and show ways to overcome limitations (i.e., sampling constraints). To improve the current state of the art in power and energy measurements at the system-software level, we present the design and implementation of PINPOINT, an energy-profiling tool which unifies different power and energy measurement interfaces.}, language = {en} } @misc{SchmausPfeifferHoenigetal., author = {Schmaus, Florian and Pfeiffer, Nicolas and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Nowa: A Wait-Free Continuation-Stealing Concurrency Platform}, series = {2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, journal = {2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, publisher = {IEEE}, isbn = {978-1-6654-4066-0}, doi = {10.1109/IPDPS49936.2021.00044}, pages = {360 -- 371}, language = {en} } @misc{RabensteinNguyenGierschetal., author = {Rabenstein, Jonas and Nguyen, Dustin and Giersch, Oliver and Eichler, Christian and H{\"o}nig, Timo and Nolte, J{\"o}rg and Schr{\"o}der-Preikschat, Wolfgang}, title = {Back to the core-memory age: running operating systems in NVRAM only}, series = {Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023}, journal = {Proceedings: architecture of computing systems: 36th International Conference, ARCS 2023, June 13 - 15, 2023}, editor = {Goumas, Georgios and Tomforde, Sven and Brehm, J{\"u}rgen and Wildermann, Stefan and Pionteck, Thilo}, publisher = {Springer-Verlag}, isbn = {978-3-031-42784-8}, doi = {10.1007/978-3-031-42785-5_11}, pages = {153 -- 167}, abstract = {The classic core memory was completely non-volatile and thus kept at least part of the operating system persistently in main memory, even over power cycles. Nowadays we can repeat this approach with NVRAM, but with terabytes of main memory on a completely different scale and with parts of the operating-system state stored in volatile CPU caches. In this paper, we discuss our experiences of running large modern operating systems including their applications entirely in NVRAM. We adapted stock Linux and FreeBSD kernels to work exclusively with NVRAM by hiding all DRAM from the kernels at boot time to establish a realistic performance baseline without changing anything else. Following this entirely NVRAM-agnostic approach, we could observe an effective performance penalty of a factor of about four, but only negligible increases in whole-system power draw. For our system with two CPU sockets and 56 cores total, we also observed a reduction in power draw in several scenarios. Due to prolonged execution times, the energy consumption increased as well for these measured workloads. While this might be discouraging at first sight, this result was achieved without any performance tuning as to the specific characteristics of today's NVRAM technology. Therefore, we are also discussing means to mitigate the observed shortcomings by integrating NVRAM appropriately into the memory hierarchy of future robust persistent systems.}, language = {en} }