@misc{CapellaBrandaleroJunioretal., author = {Capella, Fernanda M. and Brandalero, Marcelo and Junior, Jair Fajardo and Beck, Antonio Carlos Schneider and Carro, Luigi}, title = {A Multiple-ISA Reconfigurable Architecture}, series = {2013 III Brazilian Symposium on Computing Systems Engineering (SBESC), Dec. 4 2013 to Dec. 8 2013, Niteroi, Rio De Janeiro, Brazil}, volume = {1}, journal = {2013 III Brazilian Symposium on Computing Systems Engineering (SBESC), Dec. 4 2013 to Dec. 8 2013, Niteroi, Rio De Janeiro, Brazil}, doi = {10.1109/SBESC.2013.23}, pages = {71 -- 76}, language = {en} } @misc{BrandaleroSoutoCarroetal., author = {Brandalero, Marcelo and Souto, Thiago Dadalt and Carro, Luigi and Beck, Antonio Carlos Schneider}, title = {Predicting performance in multi-core systems with shared reconfigurable accelerators}, series = {Journal of Systems Architecture}, volume = {98}, journal = {Journal of Systems Architecture}, publisher = {Elsevier}, issn = {1383-7621}, doi = {10.1016/j.sysarc.2019.07.010}, pages = {201 -- 213}, language = {en} } @misc{BrandaleroShafiqueCarroetal., author = {Brandalero, Marcelo and Shafique, Muhammad and Carro, Luigi and Beck, Antonio Carlos Schneider}, title = {TransRec: Improving Adaptability in Single-ISA Heterogeneous Systems with Transparent and Reconfigurable Acceleration}, series = {2019 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)}, journal = {2019 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)}, isbn = {978-3-9819263-2-3}, issn = {1558-1101}, doi = {10.23919/DATE.2019.8715121}, pages = {582 -- 585}, language = {en} } @misc{OliveiraGoncalvesBrandaleroetal., author = {Oliveira, Geraldo Francisco and Gon{\c{c}}alves, Larissa Rozales and Brandalero, Marcelo and Beck, Antonio Carlos Schneider and Carro, Luigi}, title = {Employing classification-based algorithms for general-purpose approximate computing}, series = {2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)}, journal = {2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)}, isbn = {978-1-5386-4114-9}, doi = {10.1109/DAC.2018.8465822}, pages = {70:1 -- 70:6}, language = {en} } @misc{BrandaleroCarroBecketal., author = {Brandalero, Marcelo and Carro, Luigi and Beck, Antonio Carlos Schneider and Shafique, Muhammad}, title = {Approximate on-the-fly coarse-grained reconfigurable acceleration for general-purpose applications}, series = {2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)}, journal = {2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)}, isbn = {978-1-5386-4114-9}, doi = {10.1109/DAC.2018.8465930}, pages = {160:1 -- 160:6}, language = {en} } @misc{BrandaleroMalfattiOliveiraetal., author = {Brandalero, Marcelo and Malfatti, Guilherme Meneguzzi and Oliveira, Geraldo Francisco and Silveira, Leonardo Almeida da and Gon{\c{c}}alves, Larissa Rozales and Da Silva, Bruno Castro and Carro, Luigi and Beck, Antonio Carlos Schneider}, title = {Efficient Local Memory Support for Approximate Computing}, series = {2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)}, journal = {2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)}, isbn = {978-1-7281-0240-5}, issn = {2324-7894}, doi = {10.1109/SBESC.2018.00026}, pages = {122 -- 129}, language = {en} } @misc{CapellaBrandaleroCarroetal., author = {Capella, Fernanda M. and Brandalero, Marcelo and Carro, Luigi and Beck, Antonio Carlos Schneider}, title = {A multiple-ISA reconfigurable architecture}, series = {Special Issue on "Selected papers from the 2013 Brazilian Symposium on Computing Systems Engineering (SBESC 2013)"}, volume = {19}, journal = {Special Issue on "Selected papers from the 2013 Brazilian Symposium on Computing Systems Engineering (SBESC 2013)"}, number = {4}, issn = {0929-5585}, pages = {329 -- 344}, language = {en} } @misc{FernandesdosSantosBrandaleroRechJunioretal., author = {Fernandes dos Santos, Fernando and Brandalero, Marcelo and Rech Junior, Rubens Luiz and H{\"u}bner, Michael and Rech, Paolo and Sullivan, Michael and Martins Basso, Pedro and Carro, Luigi}, title = {Reduced Precision DWC: an Efficient Hardening Strategy for Mixed-Precision Architectures}, series = {IEEE Transactions on Computers}, volume = {71(2022)}, journal = {IEEE Transactions on Computers}, number = {3}, issn = {0018-9340}, doi = {10.1109/TC.2021.3058872}, pages = {573 -- 586}, abstract = {Duplication with Comparison (DWC) is an effective software-level solution to improve the reliability of computing devices. However, it introduces significant performance and energy consumption overheads that could render the protected application unsuitable for high-performance computing or real-time safety-critical applications. Modern computing architectures offer the possibility to execute operations in various precisions, and recent NVIDIA GPUs even feature dedicated functional units for computing with programmable accuracy. In this work, we propose Reduced-Precision Duplication with Comparison (RP-DWC) as a means to leverage the available mixed-precision hardware resources to implement software-level fault detection with reduced overheads. We discuss the benefits and challenges associated with RP-DWC and show that the intrinsic difference between the mixed-precision copies allows for the detection of most, but not all, errors. However, as the undetected faults are the ones that fall into the difference between precisions, they are the ones that produce a much smaller impact in the application output. We investigate, through fault injection and beam experiment campaigns, using three microbenchmarks and two real applications on Volta GPUs, RP-DWC impact into fault detection, performance, and energy consumption. We show that RP-DWC achieves an excellent coverage (up to 86\%) with minimal overheads (0.1\% time and 24\% energy consumption overhead).}, language = {en} } @misc{ExenbergerBeckerSartorBrandaleroetal., author = {Exenberger Becker, Pedro H. and Sartor, Anderson L. and Brandalero, Marcelo and Jost, Tiago Trevisan and Wong, Stephan and Carro, Luigi and Beck, Antonio Carlos Schneider}, title = {A Low-Cost BRAM-Based Function Reuse for Configurable Soft-Core Processors in FPGAs}, series = {Applied Reconfigurable Computing. Architectures, Tools, and Applications 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings}, journal = {Applied Reconfigurable Computing. Architectures, Tools, and Applications 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings}, publisher = {Springer}, address = {Cham}, isbn = {978-3-319-78889-0}, issn = {0302-9743}, doi = {10.1007/978-3-319-78890-6_40}, pages = {499 -- 510}, language = {en} } @misc{BrandaleroCarroBecketal., author = {Brandalero, Marcelo and Carro, Luigi and Beck, Antonio Carlos Schneider and Shafique, Muhammad}, title = {Multi-Target Adaptive Reconfigurable Acceleration for Low-Power IoT Processing}, series = {IEEE Transactions on Computers}, journal = {IEEE Transactions on Computers}, issn = {0018-9340}, doi = {10.1109/TC.2020.2984736}, pages = {1}, language = {en} }